From 2af78520069c245d5cba69039615425503736264 Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Fri, 3 Dec 2021 19:06:43 -0800 Subject: [PATCH] Cache clock edge event objects --- cocotbext/eth/eth_mac.py | 4 +- cocotbext/eth/gmii.py | 8 +++- cocotbext/eth/mii.py | 8 +++- cocotbext/eth/ptp.py | 8 +++- cocotbext/eth/rgmii.py | 38 +++++++++++-------- cocotbext/eth/xgmii.py | 8 +++- tests/gmii/test_gmii.py | 4 +- tests/mii/test_mii.py | 4 +- tests/ptp_clock/test_ptp_clock.py | 14 +++---- .../test_ptp_clock_sim_time.py | 5 +-- tests/rgmii/test_rgmii.py | 4 +- tests/xgmii/test_xgmii.py | 4 +- 12 files changed, 68 insertions(+), 41 deletions(-) diff --git a/cocotbext/eth/eth_mac.py b/cocotbext/eth/eth_mac.py index 75275f3..dff1f56 100644 --- a/cocotbext/eth/eth_mac.py +++ b/cocotbext/eth/eth_mac.py @@ -322,8 +322,10 @@ class EthMacTx(Reset): await Timer(self.time_scale*self.ifg*8//self.speed, 'step') async def _run_ts(self): + clock_edge_event = RisingEdge(self.clock) + while True: - await RisingEdge(self.clock) + await clock_edge_event self.ptp_ts_valid.value = 0 if not self.ts_queue.empty(): diff --git a/cocotbext/eth/gmii.py b/cocotbext/eth/gmii.py index ded68e1..1338d5e 100644 --- a/cocotbext/eth/gmii.py +++ b/cocotbext/eth/gmii.py @@ -264,8 +264,10 @@ class GmiiSource(Reset): ifg_cnt = 0 self.active = False + clock_edge_event = RisingEdge(self.clock) + while True: - await RisingEdge(self.clock) + await clock_edge_event if self.enable is None or self.enable.value: if ifg_cnt > 0: @@ -428,8 +430,10 @@ class GmiiSink(Reset): frame = None self.active = False + clock_edge_event = RisingEdge(self.clock) + while True: - await RisingEdge(self.clock) + await clock_edge_event if self.enable is None or self.enable.value: d_val = self.data.value.integer diff --git a/cocotbext/eth/mii.py b/cocotbext/eth/mii.py index 5bfb3be..72e0692 100644 --- a/cocotbext/eth/mii.py +++ b/cocotbext/eth/mii.py @@ -165,8 +165,10 @@ class MiiSource(Reset): ifg_cnt = 0 self.active = False + clock_edge_event = RisingEdge(self.clock) + while True: - await RisingEdge(self.clock) + await clock_edge_event if self.enable is None or self.enable.value: if ifg_cnt > 0: @@ -319,8 +321,10 @@ class MiiSink(Reset): frame = None self.active = False + clock_edge_event = RisingEdge(self.clock) + while True: - await RisingEdge(self.clock) + await clock_edge_event if self.enable is None or self.enable.value: d_val = self.data.value.integer diff --git a/cocotbext/eth/ptp.py b/cocotbext/eth/ptp.py index 649317d..c3ee456 100644 --- a/cocotbext/eth/ptp.py +++ b/cocotbext/eth/ptp.py @@ -208,8 +208,10 @@ class PtpClock(Reset): self._run_cr = cocotb.fork(self._run()) async def _run(self): + clock_edge_event = RisingEdge(self.clock) + while True: - await RisingEdge(self.clock) + await clock_edge_event if self.ts_step is not None: self.ts_step.value = self.ts_updated @@ -309,8 +311,10 @@ class PtpClockSimTime: return self.get_ts_64()*1e-9 async def _run(self): + clock_edge_event = RisingEdge(self.clock) + while True: - await RisingEdge(self.clock) + await clock_edge_event self.ts_64_fns, self.ts_64_ns = math.modf(get_sim_time('ns')) diff --git a/cocotbext/eth/rgmii.py b/cocotbext/eth/rgmii.py index d765b99..997e95c 100644 --- a/cocotbext/eth/rgmii.py +++ b/cocotbext/eth/rgmii.py @@ -166,8 +166,11 @@ class RgmiiSource(Reset): er = 0 en = 0 + clock_rising_edge_event = RisingEdge(self.clock) + clock_falling_edge_event = FallingEdge(self.clock) + while True: - await RisingEdge(self.clock) + await clock_rising_edge_event # send high nibble after rising edge, leading in to falling edge self.data.value = d >> 4 @@ -232,11 +235,11 @@ class RgmiiSource(Reset): self.active = False self.idle_event.set() - await FallingEdge(self.clock) + await clock_falling_edge_event - # send low nibble after falling edge, leading in to rising edge - self.data.value = d & 0x0F - self.ctrl.value = en + # send low nibble after falling edge, leading in to rising edge + self.data.value = d & 0x0F + self.ctrl.value = en class RgmiiSink(Reset): @@ -339,21 +342,24 @@ class RgmiiSink(Reset): dv_val = 0 er_val = 0 + clock_rising_edge_event = RisingEdge(self.clock) + clock_falling_edge_event = FallingEdge(self.clock) + while True: - await RisingEdge(self.clock) - - # capture low nibble on rising edge - d_val = self.data.value.integer - dv_val = self.ctrl.value.integer - - await FallingEdge(self.clock) - - # capture high nibble on falling edge - d_val |= self.data.value.integer << 4 - er_val = dv_val ^ self.ctrl.value.integer + await clock_rising_edge_event if self.enable is None or self.enable.value: + # capture low nibble on rising edge + d_val = self.data.value.integer + dv_val = self.ctrl.value.integer + + await clock_falling_edge_event + + # capture high nibble on falling edge + d_val |= self.data.value.integer << 4 + er_val = dv_val ^ self.ctrl.value.integer + if frame is None: if dv_val: # start of frame diff --git a/cocotbext/eth/xgmii.py b/cocotbext/eth/xgmii.py index 68e5edf..c8fb120 100644 --- a/cocotbext/eth/xgmii.py +++ b/cocotbext/eth/xgmii.py @@ -272,8 +272,10 @@ class XgmiiSource(Reset): deficit_idle_cnt = 0 self.active = False + clock_edge_event = RisingEdge(self.clock) + while True: - await RisingEdge(self.clock) + await clock_edge_event if self.enable is None or self.enable.value: if ifg_cnt + deficit_idle_cnt > self.byte_lanes-1 or (not self.enable_dic and ifg_cnt > 4): @@ -456,8 +458,10 @@ class XgmiiSink(Reset): frame = None self.active = False + clock_edge_event = RisingEdge(self.clock) + while True: - await RisingEdge(self.clock) + await clock_edge_event if self.enable is None or self.enable.value: for offset in range(self.byte_lanes): diff --git a/tests/gmii/test_gmii.py b/tests/gmii/test_gmii.py index e18a929..f7d48ca 100644 --- a/tests/gmii/test_gmii.py +++ b/tests/gmii/test_gmii.py @@ -82,9 +82,11 @@ class TB: self.set_enable_generator(None) async def _run_enable(self): + clock_edge_event = RisingEdge(self.dut.clk) + for val in self._enable_generator: self.dut.gmii_clk_en <= val - await RisingEdge(self.dut.clk) + await clock_edge_event async def run_test(dut, payload_lengths=None, payload_data=None, ifg=12, enable_gen=None, mii_sel=False): diff --git a/tests/mii/test_mii.py b/tests/mii/test_mii.py index 3d146f8..73e0cf4 100644 --- a/tests/mii/test_mii.py +++ b/tests/mii/test_mii.py @@ -81,9 +81,11 @@ class TB: self.set_enable_generator(None) async def _run_enable(self): + clock_edge_event = RisingEdge(self.dut.clk) + for val in self._enable_generator: self.dut.mii_clk_en <= val - await RisingEdge(self.dut.clk) + await clock_edge_event async def run_test(dut, payload_lengths=None, payload_data=None, ifg=12, enable_gen=None): diff --git a/tests/ptp_clock/test_ptp_clock.py b/tests/ptp_clock/test_ptp_clock.py index e114dd2..b8e7332 100644 --- a/tests/ptp_clock/test_ptp_clock.py +++ b/tests/ptp_clock/test_ptp_clock.py @@ -30,7 +30,7 @@ import cocotb_test.simulator import cocotb from cocotb.clock import Clock -from cocotb.triggers import RisingEdge +from cocotb.triggers import RisingEdge, ClockCycles from cocotb.utils import get_sim_time from cocotbext.eth import PtpClock @@ -79,8 +79,7 @@ async def run_default_rate(dut): start_ts_96 = (dut.ts_96.value.integer >> 48) + ((dut.ts_96.value.integer & 0xffffffffffff)/2**16*1e-9) start_ts_64 = dut.ts_64.value.integer/2**16*1e-9 - for k in range(10000): - await RisingEdge(dut.clk) + await ClockCycles(dut.clk, 10000) stop_time = get_sim_time('sec') stop_ts_96 = (dut.ts_96.value.integer >> 48) + ((dut.ts_96.value.integer & 0xffffffffffff)/2**16*1e-9) @@ -126,8 +125,7 @@ async def run_load_timestamps(dut): start_ts_96 = (dut.ts_96.value.integer >> 48) + ((dut.ts_96.value.integer & 0xffffffffffff)/2**16*1e-9) start_ts_64 = dut.ts_64.value.integer/2**16*1e-9 - for k in range(2000): - await RisingEdge(dut.clk) + await ClockCycles(dut.clk, 2000) stop_time = get_sim_time('sec') stop_ts_96 = (dut.ts_96.value.integer >> 48) + ((dut.ts_96.value.integer & 0xffffffffffff)/2**16*1e-9) @@ -221,8 +219,7 @@ async def run_frequency_adjustment(dut): start_ts_96 = (dut.ts_96.value.integer >> 48) + ((dut.ts_96.value.integer & 0xffffffffffff)/2**16*1e-9) start_ts_64 = dut.ts_64.value.integer/2**16*1e-9 - for k in range(10000): - await RisingEdge(dut.clk) + await ClockCycles(dut.clk, 10000) stop_time = get_sim_time('sec') stop_ts_96 = (dut.ts_96.value.integer >> 48) + ((dut.ts_96.value.integer & 0xffffffffffff)/2**16*1e-9) @@ -264,8 +261,7 @@ async def run_drift_adjustment(dut): start_ts_96 = (dut.ts_96.value.integer >> 48) + ((dut.ts_96.value.integer & 0xffffffffffff)/2**16*1e-9) start_ts_64 = dut.ts_64.value.integer/2**16*1e-9 - for k in range(10000): - await RisingEdge(dut.clk) + await ClockCycles(dut.clk, 10000) stop_time = get_sim_time('sec') stop_ts_96 = (dut.ts_96.value.integer >> 48) + ((dut.ts_96.value.integer & 0xffffffffffff)/2**16*1e-9) diff --git a/tests/ptp_clock_sim_time/test_ptp_clock_sim_time.py b/tests/ptp_clock_sim_time/test_ptp_clock_sim_time.py index 5a3f023..02187a0 100644 --- a/tests/ptp_clock_sim_time/test_ptp_clock_sim_time.py +++ b/tests/ptp_clock_sim_time/test_ptp_clock_sim_time.py @@ -30,7 +30,7 @@ import cocotb_test.simulator import cocotb from cocotb.clock import Clock -from cocotb.triggers import RisingEdge +from cocotb.triggers import RisingEdge, ClockCycles from cocotb.utils import get_sim_time from cocotbext.eth import PtpClockSimTime @@ -66,8 +66,7 @@ async def run_test(dut): start_ts_96 = (dut.ts_96.value.integer >> 48) + ((dut.ts_96.value.integer & 0xffffffffffff)/2**16*1e-9) start_ts_64 = dut.ts_64.value.integer/2**16*1e-9 - for k in range(10000): - await RisingEdge(dut.clk) + await ClockCycles(dut.clk, 10000) stop_time = get_sim_time('sec') stop_ts_96 = (dut.ts_96.value.integer >> 48) + ((dut.ts_96.value.integer & 0xffffffffffff)/2**16*1e-9) diff --git a/tests/rgmii/test_rgmii.py b/tests/rgmii/test_rgmii.py index e45f649..c4af6e9 100644 --- a/tests/rgmii/test_rgmii.py +++ b/tests/rgmii/test_rgmii.py @@ -80,9 +80,11 @@ class TB: self.set_enable_generator(None) async def _run_enable(self): + clock_edge_event = RisingEdge(self.dut.clk) + for val in self._enable_generator: self.dut.rgmii_clk_en <= val - await RisingEdge(self.dut.clk) + await clock_edge_event async def run_test(dut, payload_lengths=None, payload_data=None, ifg=12, enable_gen=None, mii_sel=False): diff --git a/tests/xgmii/test_xgmii.py b/tests/xgmii/test_xgmii.py index 71733f8..1a3dd30 100644 --- a/tests/xgmii/test_xgmii.py +++ b/tests/xgmii/test_xgmii.py @@ -80,9 +80,11 @@ class TB: self.set_enable_generator(None) async def _run_enable(self): + clock_edge_event = RisingEdge(self.dut.clk) + for val in self._enable_generator: self.dut.xgmii_clk_en <= val - await RisingEdge(self.dut.clk) + await clock_edge_event async def run_test(dut, payload_lengths=None, payload_data=None, ifg=12, enable_dic=True,