134 lines
3.7 KiB
Python
134 lines
3.7 KiB
Python
"""
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Copyright (c) 2020 Alex Forencich
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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THE SOFTWARE.
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"""
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import enum
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# Ethernet frame
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class EthPre(enum.IntEnum):
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PRE = 0x55
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SFD = 0xD5
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ETH_PREAMBLE = b'\x55\x55\x55\x55\x55\x55\x55\xd5'
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# XGMII control characters
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class XgmiiCtrl(enum.IntEnum):
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IDLE = 0x07
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LPI = 0x06
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START = 0xfb
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TERM = 0xfd
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ERROR = 0xfe
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SEQ_OS = 0x9c
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RES_0 = 0x1c
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RES_1 = 0x3c
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RES_2 = 0x7c
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RES_3 = 0xbc
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RES_4 = 0xdc
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RES_5 = 0xf7
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SIG_OS = 0x5c
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# BASE-R control characters
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class BaseRCtrl(enum.IntEnum):
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IDLE = 0x00
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LPI = 0x06
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ERROR = 0x1e
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RES_0 = 0x2d
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RES_1 = 0x33
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RES_2 = 0x4b
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RES_3 = 0x55
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RES_4 = 0x66
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RES_5 = 0x78
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# BASE-R O codes
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class BaseRO(enum.IntEnum):
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SEQ_OS = 0x0
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SIG_OS = 0xf
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# BASE-R sync header
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class BaseRSync(enum.IntEnum):
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DATA = 0b10
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CTRL = 0b01
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# BASE-R block type field
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class BaseRBlockType(enum.IntEnum):
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CTRL = 0x1e # C7 C6 C5 C4 C3 C2 C1 C0 BT
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OS_4 = 0x2d # D7 D6 D5 O4 C3 C2 C1 C0 BT
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START_4 = 0x33 # D7 D6 D5 C3 C2 C1 C0 BT
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OS_START = 0x66 # D7 D6 D5 O0 D3 D2 D1 BT
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OS_04 = 0x55 # D7 D6 D5 O4 O0 D3 D2 D1 BT
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START_0 = 0x78 # D7 D6 D5 D4 D3 D2 D1 BT
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OS_0 = 0x4b # C7 C6 C5 C4 O0 D3 D2 D1 BT
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TERM_0 = 0x87 # C7 C6 C5 C4 C3 C2 C1 BT
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TERM_1 = 0x99 # C7 C6 C5 C4 C3 C2 D0 BT
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TERM_2 = 0xaa # C7 C6 C5 C4 C3 D1 D0 BT
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TERM_3 = 0xb4 # C7 C6 C5 C4 D2 D1 D0 BT
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TERM_4 = 0xcc # C7 C6 C5 D3 D2 D1 D0 BT
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TERM_5 = 0xd2 # C7 C6 D4 D3 D2 D1 D0 BT
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TERM_6 = 0xe1 # C7 D5 D4 D3 D2 D1 D0 BT
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TERM_7 = 0xff # D6 D5 D4 D3 D2 D1 D0 BT
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xgmii_ctrl_to_baser_mapping = {
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XgmiiCtrl.IDLE: BaseRCtrl.IDLE,
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XgmiiCtrl.LPI: BaseRCtrl.LPI,
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XgmiiCtrl.ERROR: BaseRCtrl.ERROR,
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XgmiiCtrl.RES_0: BaseRCtrl.RES_0,
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XgmiiCtrl.RES_1: BaseRCtrl.RES_1,
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XgmiiCtrl.RES_2: BaseRCtrl.RES_2,
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XgmiiCtrl.RES_3: BaseRCtrl.RES_3,
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XgmiiCtrl.RES_4: BaseRCtrl.RES_4,
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XgmiiCtrl.RES_5: BaseRCtrl.RES_5,
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}
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baser_ctrl_to_xgmii_mapping = {
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BaseRCtrl.IDLE: XgmiiCtrl.IDLE,
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BaseRCtrl.LPI: XgmiiCtrl.LPI,
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BaseRCtrl.ERROR: XgmiiCtrl.ERROR,
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BaseRCtrl.RES_0: XgmiiCtrl.RES_0,
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BaseRCtrl.RES_1: XgmiiCtrl.RES_1,
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BaseRCtrl.RES_2: XgmiiCtrl.RES_2,
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BaseRCtrl.RES_3: XgmiiCtrl.RES_3,
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BaseRCtrl.RES_4: XgmiiCtrl.RES_4,
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BaseRCtrl.RES_5: XgmiiCtrl.RES_5,
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}
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block_type_term_lane_mapping = {
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BaseRBlockType.TERM_0: 0,
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BaseRBlockType.TERM_1: 1,
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BaseRBlockType.TERM_2: 2,
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BaseRBlockType.TERM_3: 3,
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BaseRBlockType.TERM_4: 4,
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BaseRBlockType.TERM_5: 5,
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BaseRBlockType.TERM_6: 6,
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BaseRBlockType.TERM_7: 7,
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}
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