Alex Forencich c4ed6073d6 Skip using bus for more convenient support of non-standard signal names

2020-11-25 17:34:19 -08:00

..

__init__.py

Initial commit

2020-11-16 22:31:32 -08:00

Makefile

Dump FST traces with Verilator

2020-11-18 00:35:58 -08:00

test_xgmii.py

Skip using bus for more convenient support of non-standard signal names

2020-11-25 17:34:19 -08:00

test_xgmii.v

Add clock enable to XGMII test

2020-11-17 21:30:06 -08:00