From 6b47307d48565f9a769090882181472f702f27b5 Mon Sep 17 00:00:00 2001 From: Willis Blackburn Date: Sat, 13 Dec 2025 12:02:48 -0500 Subject: [PATCH] Applied fix to DIHOLD logic that was already applied to original cpu.v core --- cpu_65c02.v | 15 ++++----------- 1 file changed, 4 insertions(+), 11 deletions(-) diff --git a/cpu_65c02.v b/cpu_65c02.v index 967b7a3..b9839b7 100644 --- a/cpu_65c02.v +++ b/cpu_65c02.v @@ -916,15 +916,6 @@ always @(posedge clk ) * time to read the IR again before the next decode. */ -//reg RDY1 = 1; - -//always @(posedge clk ) -// RDY1 <= RDY; - -//always @(posedge clk ) -// if( ~RDY && RDY1 ) -// DIHOLD <= DI; - always @(posedge clk ) if( reset ) IRHOLD_valid <= 0; @@ -939,9 +930,11 @@ always @(posedge clk ) assign IR = (IRQ & ~I) | NMI_edge ? 8'h00 : IRHOLD_valid ? IRHOLD : DIMUX; -//assign DIMUX = ~RDY1 ? DIHOLD : DI; +always @(posedge clk ) + if( RDY ) + DIHOLD <= DI; -assign DIMUX = DI; +assign DIMUX = ~RDY ? DIHOLD : DI; /* * Microcode state machine