From 8f19e45b40f546e8b0fa58d43c1208d151652984 Mon Sep 17 00:00:00 2001
From: Byron Lathi <byron@byronlathi.com>
Date: Sat, 18 Apr 2026 16:02:36 -0700
Subject: [PATCH] Add WAI instruction

---
 cpu_65c02.v | 16 ++++++++++++++--
 1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/cpu_65c02.v b/cpu_65c02.v
index b9839b7..1086546 100644
--- a/cpu_65c02.v
+++ b/cpu_65c02.v
@@ -48,7 +48,7 @@
 
 // `define IMPLEMENT_CORRECT_BCD_FLAGS
 
-module cpu_65c02( clk, reset, AB, DI, DO, WE, IRQ, NMI, RDY, SYNC );
+module cpu_65c02( clk, reset, AB, DI, DO, WE, IRQ, NMI, RDY, RDY_O, SYNC );
 
 input clk;              // CPU clock
 input reset;            // reset signal
@@ -59,6 +59,7 @@ output WE;              // write enable
 input IRQ;              // interrupt request
 input NMI;              // non-maskable interrupt request
 input RDY;              // Ready signal. Pauses CPU when RDY=0
+output reg RDY_O;           // Ready output signal. Low during WAI, high otherwise
 output reg SYNC;        // AB is first cycle of the intruction
 
 /*
@@ -261,7 +262,8 @@ parameter
     IND0   = 6'd50, // (ZP)    - fetch ZP address, and send to ALU (+0)
     JMPIX0 = 6'd51, // JMP (,X)- fetch LSB and send to ALU (+X)
     JMPIX1 = 6'd52, // JMP (,X)- fetch MSB and send to ALU (+Carry)
-    JMPIX2 = 6'd53; // JMP (,X)- Wait for ALU (only if needed)
+    JMPIX2 = 6'd53, // JMP (,X)- Wait for ALU (only if needed)
+    WAI    = 6'd54; // WAI - Wait for interrupt, then go to decode
 
 `ifdef SIM
 
@@ -326,6 +328,7 @@ always @*
             JMPIX0: statename = "JMPIX0";
             JMPIX1: statename = "JMPIX1";
             JMPIX2: statename = "JMPIX2";
+            WAI:    statename = "WAI";
 
     endcase
 
@@ -806,6 +809,12 @@ always @*
         default:        CI = 0;
     endcase
 
+always  @*
+    if (state == WAI)
+        RDY_O = 1'b0;
+    else
+        RDY_O = 1'b1;
+
 /*
  * Processor Status Register update
  *
@@ -956,6 +965,7 @@ always @(posedge clk or posedge reset)
                 8'b0110_0000:   state <= RTS0;
                 8'b0110_1100:   state <= JMPI0;
                 8'b0111_1100:   state <= JMPIX0;
+                8'b1100_1011:   state <= WAI;
 `ifdef IMPLEMENT_NOPS
                 8'bxxxx_xx11:   state <= REG;   // (NOP1: 3/7/B/F column)
                 8'bxxx0_0010:   state <= FETCH; // (NOP2: 2 column, 4 column handled correctly below)
@@ -1061,6 +1071,8 @@ always @(posedge clk or posedge reset)
         BRK2    : state <= BRK3;
         BRK3    : state <= JMP0;
 
+        WAI     : state <= ( (~I & IRQ) | NMI_edge ) ? DECODE : WAI;
+
     endcase