From a11631082b20e8a0746cd5cc4ae8bbe68bff79c4 Mon Sep 17 00:00:00 2001 From: Arlet Ottens Date: Fri, 19 Aug 2016 20:19:40 +0200 Subject: [PATCH] Added fix for 1-cycle RDY bug --- cpu.v | 15 +++++---------- 1 file changed, 5 insertions(+), 10 deletions(-) diff --git a/cpu.v b/cpu.v index a08804f..ed8da62 100644 --- a/cpu.v +++ b/cpu.v @@ -836,15 +836,6 @@ always @(posedge clk ) * time to read the IR again before the next decode. */ -reg RDY1 = 1; - -always @(posedge clk ) - RDY1 <= RDY; - -always @(posedge clk ) - if( ~RDY && RDY1 ) - DIHOLD <= DI; - always @(posedge clk ) if( reset ) IRHOLD_valid <= 0; @@ -859,7 +850,11 @@ always @(posedge clk ) assign IR = (IRQ & ~I) | NMI_edge ? 8'h00 : IRHOLD_valid ? IRHOLD : DIMUX; -assign DIMUX = ~RDY1 ? DIHOLD : DI; +always @(posedge clk ) + if( RDY ) + DIHOLD <= DI; + +assign DIMUX = ~RDY ? DIHOLD : DI; /* * Microcode state machine