Initial Commit - Forked from PeakRDL-regblock @ a440cc19769069be831d267505da4f3789a26695

This commit is contained in:
Arnav Sacheti
2025-10-10 22:28:36 -07:00
commit 9bf5cd1e68
308 changed files with 19414 additions and 0 deletions

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addrmap top {
default paritycheck;
default sw=rw;
default hw=na;
reg my_reg {
field {} f1[16] = 0;
field {} f2[8] = 0;
field {} f3 = 0;
};
my_reg r1 @ 0x000;
my_reg r2[8] @ 0x1000;
};

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{% extends "lib/tb_base.sv" %}
{% block seq %}
{% sv_line_anchor %}
##1;
cb.rst <= '0;
##1;
fork
begin
repeat(50) begin
automatic int i = $urandom_range(7,0);
cpuif.write('h0, $urandom());
cpuif.write('h1000 + i*4, $urandom());
end
end
begin
forever begin
assert(cb.parity_error != 1'b1);
@cb;
end
end
join_any
disable fork;
cpuif.write('h0, 'd0);
assign dut.field_storage.r1.f1.value = 16'd1;
deassign dut.field_storage.r1.f1.value;
@cb;
@cb;
assert(cb.parity_error == 1'b1);
cpuif.write('h0, 'd0);
@cb;
@cb;
assert(cb.parity_error == 1'b0);
{% endblock %}

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from ..lib.sim_testcase import SimTestCase
class Test(SimTestCase):
def test_dut(self):
self.run_test()