bslathi19/PeakRDL-BusDecoder
1
0
Fork 0
Code Issues Actions Packages Projects Releases Wiki Activity
16 Commits 5 Branches 5 Tags
e210167f2ed075cdf35a96dda9c1c0f25c05b5c9
Go to file
Clone
Open with VS Code Open with VSCodium Open with Intellij IDEA
Download ZIP Download TAR.GZ Download BUNDLE

README.md

Documentation Status build Coverage Status PyPI - Python Version

PeakRDL-busdecoder

Compile SystemRDL into a SystemVerilog control/status register (CSR) block.

For the command line tool, see the PeakRDL project.

Documentation

See the PeakRDL-busdecoder Documentation for more details

Reference in New Issue View Git Blame Copy Permalink
Description
No description provided
Readme 1.2 MiB
Languages
Python 93.6%
SystemVerilog 6.2%
Dockerfile 0.2%