Add ability to control default reset style. #34

tests/lib/base_testcase.py

@@ -37,6 +37,8 @@ class BaseTestCase(unittest.TestCase):
     retime_read_response = False
     reuse_hwif_typedefs = True
     retime_external = False
+    default_reset_activelow = False
+    default_reset_async = False
 
     #: this gets auto-loaded via the _load_request autouse fixture
     request = None # type: pytest.FixtureRequest
@@ -111,6 +113,8 @@ class BaseTestCase(unittest.TestCase):
             retime_external_regfile=cls.retime_external,
             retime_external_mem=cls.retime_external,
             retime_external_addrmap=cls.retime_external,
+            default_reset_activelow=cls.default_reset_activelow,
+            default_reset_async=cls.default_reset_async,
         )
 
     @classmethod

tests/lib/tb_base.sv

@@ -10,6 +10,11 @@ module tb;
         clk = ~clk;
     end
 
+    logic rst_n, arst, arst_n;
+    assign rst_n = ~rst;
+    assign arst = rst;
+    assign arst_n = ~rst;
+
     //--------------------------------------------------------------------------
     // DUT Signal declarations
     //--------------------------------------------------------------------------

tests/test_structural_sw_rw/testcase.py

@@ -4,15 +4,24 @@ from parameterized import parameterized_class
 
 from ..lib.sim_testcase import SimTestCase
 from ..lib.synth_testcase import SynthTestCase
-from ..lib.test_params import TEST_PARAMS
+from ..lib.test_params import TEST_PARAMS, get_permutations
 from ..lib.simulators.xilinx import Xilinx
 import pytest
 
 @parameterized_class(TEST_PARAMS)
-class Test(SimTestCase):
+class TestParameterizations(SimTestCase):
     def test_dut(self):
         self.run_test()
 
+@parameterized_class(get_permutations({
+    "default_reset_activelow": [True, False],
+    "default_reset_async": [True, False],
+}))
+class TestDefaultResets(SimTestCase):
+    def test_dut(self):
+        self.run_test()
+
+
 @parameterized_class(TEST_PARAMS)
 class TestSynth(SynthTestCase):
     def test_dut(self):