4 Commits

Author	SHA1	Message	Date
Alex Mykyta	808067fac9	Fix synthesizability of fields with msb0 ordering	2022-10-17 23:24:35 -07:00
Alex Mykyta	e07e7d26b2	Add support for wide registers (where accesswidth < regwidth)	2022-10-17 22:13:29 -07:00
Alex Mykyta	a1808298ae	Enable Vivado's xsim to run on some simpler testcases for better compile-check coverage. #7	2022-05-02 20:22:55 -07:00
Alex Mykyta	54d783e1ab	Reorganize test dir to ensure test of installed pkg	2022-02-28 23:08:41 -08:00