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Alex Mykyta 0d82154b9d Add support for field paritycheck. #35
2023-05-15 22:53:17 -07:00
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Add coveralls
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Add support for field paritycheck. #35
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Add Intel Avalon MM cpuif. #40
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setup.py
Implement write buffering (#22)
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README.md

Documentation Status build Coverage Status PyPI - Python Version

PeakRDL-regblock

Compile SystemRDL into a SystemVerilog control/status register (CSR) block.

For the command line tool, see the PeakRDL project.

Documentation

See the PeakRDL-regblock Documentation for more details

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Readme 1.3 MiB
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Python 56.8%
SystemVerilog 42.8%
Tcl 0.3%
Shell 0.1%