Alex Mykyta 1926aff7b1 Add missing comment for external components

2025-10-25 19:23:28 -07:00

..

cpuif

Add 's_' prefix to OBI port for consistency with all other cpuifs

2025-10-25 17:24:57 -07:00

field_logic

Add missing comment for external components

2025-10-25 19:23:28 -07:00

hwif

Tidy up whitespace in generated package. #148

2025-07-01 16:56:41 -07:00

read_buffering

don't emit write/read-buffer logic for external components

2025-10-24 18:41:18 -07:00

readback

Error response for unmapped address or forbidden read/write access (#168)

2025-10-25 18:22:15 -07:00

udps

Add signed/fixedpoint properties (#140)

2025-05-15 08:48:44 -07:00

write_buffering

don't emit write/read-buffer logic for external components

2025-10-24 18:41:18 -07:00

__about__.py

version

2025-07-16 10:53:20 -07:00

__init__.py

Switch to use regular non-namespaced package

2022-06-09 20:24:53 -07:00

__peakrdl__.py

Error response for unmapped address or forbidden read/write access (#168)

2025-10-25 18:22:15 -07:00

addr_decode.py

Error response for unmapped address or forbidden read/write access (#168)

2025-10-25 18:22:15 -07:00

dereferencer.py

Implement new SVInt object to defer literal expansion and allow bit-fiddling operations. Fix invalid bit-slicing of literals if field reset value is a constant. #71

2023-10-24 22:50:41 -07:00

exporter.py

Error response for unmapped address or forbidden read/write access (#168)

2025-10-25 18:22:15 -07:00

external_acks.py

Omit unecessary hwif signals if an external register is read-only or write-only. #58

2023-08-02 21:38:06 -07:00

forloop_generator.py

Type hinting cleanup

2025-03-03 21:37:07 -08:00

identifier_filter.py

Add identifier filter. closes #14

2022-07-20 23:35:17 -07:00

module_tmpl.sv

Error response for unmapped address or forbidden read/write access (#168)

2025-10-25 18:22:15 -07:00

package_tmpl.sv

Tidy up whitespace in generated package. #148

2025-07-01 16:56:41 -07:00

parity.py

Add support for field paritycheck. #35

2023-05-15 22:53:17 -07:00

scan_design.py

don't emit write/read-buffer logic for external components

2025-10-24 18:41:18 -07:00

struct_generator.py

Add signed/fixedpoint properties (#140)

2025-05-15 08:48:44 -07:00

sv_int.py

Implement new SVInt object to defer literal expansion and allow bit-fiddling operations. Fix invalid bit-slicing of literals if field reset value is a constant. #71

2023-10-24 22:50:41 -07:00

utils.py

Type hinting cleanup

2025-03-03 21:37:07 -08:00

validate_design.py

Emit error if field that is asynchronously reset uses a dynamic reset value. #129

2025-03-07 19:20:44 -08:00