85 lines
2.0 KiB
Systemverilog
85 lines
2.0 KiB
Systemverilog
// TODO: Add a banner
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package test_regblock_pkg;
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// test_regblock.r0.a
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typedef struct {
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logic [7:0] value;
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logic anded;
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} test_regblock__r0__a__out_t;
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// test_regblock.r0.b
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typedef struct {
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logic [7:0] value;
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logic ored;
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} test_regblock__r0__b__out_t;
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// test_regblock.r0.c
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typedef struct {
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logic [7:0] value;
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logic swmod;
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} test_regblock__r0__c__out_t;
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// test_regblock.r0
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typedef struct {
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test_regblock__r0__a__out_t a;
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test_regblock__r0__b__out_t b;
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test_regblock__r0__c__out_t c;
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} test_regblock__r0__out_t;
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// test_regblock.r1.a
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typedef struct {
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logic [7:0] value;
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logic anded;
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} test_regblock__r1__a__out_t;
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// test_regblock.r1.b
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typedef struct {
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logic [7:0] value;
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logic ored;
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} test_regblock__r1__b__out_t;
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// test_regblock.r1.c
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typedef struct {
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logic [7:0] value;
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logic swmod;
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} test_regblock__r1__c__out_t;
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// test_regblock.r1
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typedef struct {
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test_regblock__r1__a__out_t a;
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test_regblock__r1__b__out_t b;
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test_regblock__r1__c__out_t c;
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} test_regblock__r1__out_t;
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// test_regblock.r2.a
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typedef struct {
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logic [7:0] value;
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logic anded;
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} test_regblock__r2__a__out_t;
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// test_regblock.r2.b
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typedef struct {
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logic [7:0] value;
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logic ored;
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} test_regblock__r2__b__out_t;
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// test_regblock.r2.c
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typedef struct {
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logic [7:0] value;
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logic swmod;
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} test_regblock__r2__c__out_t;
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// test_regblock.r2
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typedef struct {
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test_regblock__r2__a__out_t a;
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test_regblock__r2__b__out_t b;
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test_regblock__r2__c__out_t c;
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} test_regblock__r2__out_t;
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// test_regblock
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typedef struct {
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test_regblock__r0__out_t r0;
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test_regblock__r1__out_t r1;
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test_regblock__r2__out_t r2;
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} test_regblock__out_t;
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endpackage |