27 lines
408 B
ReStructuredText
27 lines
408 B
ReStructuredText
Register Block Architecture
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===========================
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TODO: Add full block diagram
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CPU Interface
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-------------
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TODO: describe boundary signals. Timing diagrams
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Address Decode
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--------------
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TODO: describe boundary signals. Timing diagrams
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Field Logic
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-----------
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TODO: describe boundary signals. Timing diagrams
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Readback
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--------
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TODO: describe boundary signals. Timing diagrams
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Retiming options
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