42 lines
1.1 KiB
Systemverilog
42 lines
1.1 KiB
Systemverilog
{% sv_line_anchor %}
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obi_intf #(
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.DATA_WIDTH({{exporter.cpuif.data_width}}),
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.ADDR_WIDTH({{exporter.cpuif.addr_width}})
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) s_obi();
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obi_intf_driver #(
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.DATA_WIDTH({{exporter.cpuif.data_width}}),
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.ADDR_WIDTH({{exporter.cpuif.addr_width}})
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) cpuif (
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.clk(clk),
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.rst(rst),
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.m_obi(s_obi)
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);
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{% if type(cpuif).__name__.startswith("Flat") %}
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{% sv_line_anchor %}
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wire s_obi_req;
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wire s_obi_gnt;
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wire [{{exporter.cpuif.addr_width - 1}}:0] s_obi_addr;
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wire s_obi_we;
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wire [{{exporter.cpuif.data_width_bytes - 1}}:0] s_obi_be;
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wire [{{exporter.cpuif.data_width - 1}}:0] s_obi_wdata;
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wire [0:0] s_obi_aid;
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wire s_obi_rvalid;
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wire s_obi_rready;
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wire [{{exporter.cpuif.data_width - 1}}:0] s_obi_rdata;
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wire s_obi_err;
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wire [0:0] s_obi_rid;
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assign s_obi_req = s_obi.req;
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assign s_obi.gnt = s_obi_gnt;
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assign s_obi_addr = s_obi.addr;
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assign s_obi_we = s_obi.we;
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assign s_obi_be = s_obi.be;
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assign s_obi_wdata = s_obi.wdata;
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assign s_obi_aid = s_obi.aid;
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assign s_obi.rvalid = s_obi_rvalid;
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assign s_obi_rready = s_obi.rready;
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assign s_obi.rdata = s_obi_rdata;
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assign s_obi.err = s_obi_err;
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assign s_obi.rid = s_obi_rid;
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{% endif %}
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