110 lines
4.3 KiB
Plaintext
110 lines
4.3 KiB
Plaintext
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================================================================================
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Things that need validation by the compiler
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================================================================================
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Many of these are probably already covered, but being paranoid.
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Make a list of things as I think of them.
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Keep them here in case I forget and re-think of them.
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Mark these as follows:
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X = Yes, confirmed that the compiler covers this
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! = No! Confirmed that the compiler does not check this, and should.
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? = TBD
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--------------------------------------------------------------------------------
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X resetsignal width
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reset signals shall have width of 1
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X Field has no knowable value
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- does not implement storage
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- hw is not writable
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- sw is readable
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- No reset value specified
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--> emit a warning?
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X References to a component or component property must use unambiguous array indexing
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For example, if "array_o_regs" is an array...
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The following is illegal:
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my_reg.my_field->next = array_o_regs.thing
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my_reg.my_field->next = array_o_regs.thing->anded
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This is ok:
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my_reg.my_field->next = array_o_regs[2].thing
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my_reg.my_field->next = array_o_regs[2].thing->anded
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NEVERMIND - compiler does not allow indefinite array references at all!
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References are guaranteed to be unambiguous:
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"Incompatible number of index dimensions after 'CTRL'. Expected 1, found 0."
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X Clause 10.6.1-f (wide registers cannot have access side-effects)
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X multiple field_reset in the same hierarchy
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there can only be one signal declared with field_reset
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in a given hierarchy
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X multiple cpuif_reset in the same hierarchy
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there can only be one signal declared with cpuif_reset
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in a given hierarchy
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! incrwidth/incrvalue & decrvalue/decrwidth
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these pairs are mutually exclusive.
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Make sure they are not both set after elaboration
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Compiler checks for mutex within the same scope, but
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i dont think I check for mutexes post-elaborate
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... or, make these properties clear each-other on assignment
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? If a node ispresent=true, and any of it's properties are a reference,
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then thse references' its ispresent shall also be true
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Pretty sure this is an explicit clause in the spec.
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Make sure it is actually implemented
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? Illegal property references:
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- reference any of the counter property references to something that isn't a counter
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- reference hwclr or hwset, but the owner node has them set to False
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means that the actual inferred signal doesnt exist!
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- reference swwe/swwel or we/wel, but the owner node has them, AND their complement set to False
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means that the actual inferred signal doesnt exist!
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================================================================================
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Things that need validation by this exporter
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================================================================================
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List of stuff in case I forget.
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X = Yes! I already implemented this.
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! = No! exporter does not enforce this yet
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--------------------------------------------------------------------------------
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! "bridge" addrmap not supported
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export shall refuse to process an addrmap marked as a "bridge"
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Only need to check top-level. Compiler will enforce that child nodes arent bridges
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cpuif_resets
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! Warn/error on any signal with cpuif_reset set, that is not in the top-level
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addrmap. At the very least, warn that it will be ignored
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! async data signals
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Only supporting async signals if they are exclusively used in resets.
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Anyhting else declared as "async" shall be an error
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I have zero interest in implementing resynchronizers
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! regwidth/accesswidth is sane
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! accesswidth is the same for all registers in the regblock
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- accesswidth is what implies the cpuif bus width
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! accesswidth == regwidth
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Enforce this for now. Dont feel like supporting fancy modes yet
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X regwidth < accesswidth
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This is illegal and is enforced by the compiler.
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! regwidth > accesswidth
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Need to extend address decode strobes to have multiple bits
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this is where looking at endinaness matters to determine field placement
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! Contents of target are all internal. No external regs
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! Does not contain any mem components
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! Do not allow unaligned addresses
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All offsets & strides shall be a multiple of the accesswidth used
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