77 lines
1.4 KiB
Plaintext
77 lines
1.4 KiB
Plaintext
addrmap top {
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default regwidth = 32;
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default sw=rw;
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default hw=na;
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// Internal registers
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reg {
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field {
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sw=rw; hw=na; // Storage element
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} f[31:0] = 40;
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} r_rw;
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reg {
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field {
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sw=r; hw=na; // Wire/Bus - constant value
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} f[31:0] = 80;
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} r_ro;
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reg {
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field {
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sw=w; hw=r; // Storage element
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} f[31:0] = 100;
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} r_wo;
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// Combined read-only and write-only register
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reg {
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default sw = w;
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default hw = r;
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field {} wvalue[32] = 0;
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} writeonly @ 0x1C;
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reg {
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default sw = r;
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default hw = na;
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field {} rvalue[32] = 200;
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} readonly @ 0x1C;
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// External memories
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external mem {
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memwidth = 32;
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mementries = 2;
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} mem_rw @ 0x20;
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external mem {
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memwidth = 32;
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mementries = 2;
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sw=r;
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} mem_ro @ 0x28;
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external mem {
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memwidth = 32;
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mementries = 2;
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sw=w;
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} mem_wo @ 0x30;
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// External block
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external regfile {
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// Placeholder registers
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reg {
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field {
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sw=rw; hw=na;
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} f[31:0] = 40;
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} r_rw;
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reg {
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field {
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sw=r; hw=na;
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} f[31:0] = 80;
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} r_ro;
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reg {
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field {
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sw=w; hw=r;
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} f[31:0] = 100;
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} r_wo;
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} external_rf @ 0x40;
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};
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