2023-05-04 21:50:50 -07:00
2023-03-13 21:47:33 -07:00
2021-06-01 21:57:12 -07:00
2023-03-13 21:47:33 -07:00
2022-10-29 22:02:04 -07:00

Documentation Status build Coverage Status PyPI - Python Version

PeakRDL-regblock

Compile SystemRDL into a SystemVerilog control/status register (CSR) block.

For the command line tool, see the PeakRDL project.

Documentation

See the PeakRDL-regblock Documentation for more details

Description
No description provided
Readme 1.3 MiB
Languages
Python 56.8%
SystemVerilog 42.8%
Tcl 0.3%
Shell 0.1%