Add flow control interface to pcie core

This commit is contained in:
Byron Lathi
2025-11-08 22:02:25 -08:00
parent afb8888d00
commit 9a76709aaa

View File

@@ -470,7 +470,7 @@
"pf3_bar5_size": [ { "value": "128", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ],
"pf3_bar4_prefetchable": [ { "value": "false", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"pf3_sriov_bar3_type": [ { "value": "N/A", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"mode_selection": [ { "value": "Basic", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
"mode_selection": [ { "value": "Advanced", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
"pipe_sim": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"phy_ready_retry": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"en_ext_clk": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
@@ -480,7 +480,7 @@
"axisten_freq": [ { "value": "250", "resolve_type": "user", "usage": "all" } ],
"aspm_support": [ { "value": "No_ASPM", "resolve_type": "user", "usage": "all" } ],
"SRIOV_CAP_ENABLE_EXT": [ { "value": "false", "resolve_type": "user", "usage": "all" } ],
"cfg_fc_if": [ { "value": "false", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"cfg_fc_if": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"cfg_ext_if": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"cfg_status_if": [ { "value": "false", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"per_func_status_if": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
@@ -643,7 +643,7 @@
"user_interface_signals": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"link_training_signals": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"transmit_fc_interface": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"config_fc_interface": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"config_fc_interface": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"config_status_interface": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"config_mgmt_interface": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"rx_mesg_interface": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
@@ -991,7 +991,7 @@
"CFG_STATUS_IF": [ { "value": "FALSE", "resolve_type": "generated", "usage": "all" } ],
"TX_FC_IF": [ { "value": "FALSE", "resolve_type": "generated", "usage": "all" } ],
"CFG_EXT_IF": [ { "value": "TRUE", "resolve_type": "generated", "usage": "all" } ],
"CFG_FC_IF": [ { "value": "FALSE", "resolve_type": "generated", "usage": "all" } ],
"CFG_FC_IF": [ { "value": "TRUE", "resolve_type": "generated", "usage": "all" } ],
"PER_FUNC_STATUS_IF": [ { "value": "TRUE", "resolve_type": "generated", "usage": "all" } ],
"CFG_MGMT_IF": [ { "value": "FALSE", "resolve_type": "generated", "usage": "all" } ],
"RCV_MSG_IF": [ { "value": "FALSE", "resolve_type": "generated", "usage": "all" } ],
@@ -1226,6 +1226,13 @@
"s_axis_cc_tready": [ { "direction": "out", "size_left": "3", "size_right": "0" } ],
"s_axis_cc_tuser": [ { "direction": "in", "size_left": "32", "size_right": "0", "driver_value": "0" } ],
"s_axis_cc_tvalid": [ { "direction": "in", "driver_value": "0" } ],
"cfg_fc_ph": [ { "direction": "out", "size_left": "7", "size_right": "0" } ],
"cfg_fc_pd": [ { "direction": "out", "size_left": "11", "size_right": "0" } ],
"cfg_fc_nph": [ { "direction": "out", "size_left": "7", "size_right": "0" } ],
"cfg_fc_npd": [ { "direction": "out", "size_left": "11", "size_right": "0" } ],
"cfg_fc_cplh": [ { "direction": "out", "size_left": "7", "size_right": "0" } ],
"cfg_fc_cpld": [ { "direction": "out", "size_left": "11", "size_right": "0" } ],
"cfg_fc_sel": [ { "direction": "in", "size_left": "2", "size_right": "0", "driver_value": "0" } ],
"cfg_interrupt_int": [ { "direction": "in", "size_left": "3", "size_right": "0", "driver_value": "0" } ],
"cfg_interrupt_pending": [ { "direction": "in", "size_left": "3", "size_right": "0", "driver_value": "0" } ],
"cfg_interrupt_sent": [ { "direction": "out" } ],
@@ -1391,6 +1398,20 @@
"txp": [ { "physical_name": "pci_exp_txp" } ]
}
},
"pcie4_cfg_fc": {
"vlnv": "xilinx.com:interface:pcie_cfg_fc:1.0",
"abstraction_type": "xilinx.com:interface:pcie_cfg_fc_rtl:1.0",
"mode": "master",
"port_maps": {
"CPLD": [ { "physical_name": "cfg_fc_cpld" } ],
"CPLH": [ { "physical_name": "cfg_fc_cplh" } ],
"NPD": [ { "physical_name": "cfg_fc_npd" } ],
"NPH": [ { "physical_name": "cfg_fc_nph" } ],
"PD": [ { "physical_name": "cfg_fc_pd" } ],
"PH": [ { "physical_name": "cfg_fc_ph" } ],
"SEL": [ { "physical_name": "cfg_fc_sel" } ]
}
},
"pcie4_cfg_msi": {
"vlnv": "xilinx.com:interface:pcie3_cfg_msi:1.0",
"abstraction_type": "xilinx.com:interface:pcie3_cfg_msi_rtl:1.0",