bslathi19/alibaba_pcie
1
0
Fork 0
Code Issues 2 Pull Requests Actions Packages Projects Releases Wiki Activity

Get it all working again

Browse Source
This commit is contained in:
Byron Lathi
2025-11-22 23:02:55 -08:00
parent d9a25d0a7a
commit e702967e8e
2 changed files with 21 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files

28
sim/alibaba_pcie.py
View File

@@ -76,8 +76,8 @@ class TB:
pf3_msix_pba_offset=0x00000000,
# signals
user_clk=dut.clk_250,
user_reset=dut.rst_250,
user_clk=dut.u_pcie_top.clk_250,
user_reset=dut.u_pcie_top.rst_250,
user_lnk_up=dut.u_pcie_top.user_lnk_up,
rq_bus=AxiStreamBus.from_entity(dut.u_pcie_top.s_axis_rq),
@@ -146,6 +146,7 @@ async def test_sanity(dut):
await mem.write(0, message)
# DMA from host to dma memory
await dev_bar0.write_dword(0x0, 0x00000000)
await dev_bar0.write_dword(0x4, 0x00000000)
await dev_bar0.write_dword(0x8, 0x00000000)
@@ -154,17 +155,19 @@ async def test_sanity(dut):
await Timer(1, "us")
await dev_bar0.write_dword(0x40, 0x00000000)
await dev_bar0.write_dword(0x44, 0x00000000)
await dev_bar0.write_dword(0x48, 0x00000000)
await dev_bar0.write_dword(0x4c, len(message))
await dev_bar0.write_dword(0x50, 0x00000001)
# Set up stream to memory DMA to store ethernet frame
await dev_bar0.write_dword(0x180, 0x00000000)
await dev_bar0.write_dword(0x184, 0x00000000)
await dev_bar0.write_dword(0x188, 0x00000000)
await dev_bar0.write_dword(0x18c, len(message))
await dev_bar0.write_dword(0x190, 0x00000001)
await dev_bar0.write_dword(0x60, 0x00000000)
await dev_bar0.write_dword(0x64, 0x00000000)
await dev_bar0.write_dword(0x68, 0x00000000)
await dev_bar0.write_dword(0x6c, len(message))
await dev_bar0.write_dword(0x70, 0x00000001)
# Trigger memory to stream dma to send ethernet frame
await dev_bar0.write_dword(0x1a0, 0x00000000)
await dev_bar0.write_dword(0x1a4, 0x00000000)
await dev_bar0.write_dword(0x1a8, 0x00000000)
await dev_bar0.write_dword(0x1ac, len(message))
await dev_bar0.write_dword(0x1b0, 0x00000001)
rx_frame = await tb.serdes_sinks[0].recv()
@@ -174,6 +177,7 @@ async def test_sanity(dut):
await Timer(1, "us")
# DMA from dma memory to host
await dev_bar0.write_dword(0x20, 0x00000100)
await dev_bar0.write_dword(0x24, 0x00000000)
await dev_bar0.write_dword(0x28, 0x00000000)

5
src/eth/eth_dma_wrapper.sv
View File

@@ -87,6 +87,11 @@ taxi_axis_if axis_sfp_stat();
taxi_apb_if #(.ADDR_W(pcie_dma_regs_pkg::PCIE_DMA_REGS_MIN_ADDR_WIDTH)) eth_dma_apb();
taxi_apb_if #(.ADDR_W(eth_mac_25g_us_regs_pkg::ETH_MAC_25G_US_REGS_MIN_ADDR_WIDTH)) eth_mac_apb();
eth_dma_wrapper_regs u_eth_dma_wrapper_regs (
.s_apb (s_apb),
.m_apb_eth_mac_25g_us_regs (eth_mac_apb),
.m_apb_pcie_dma_regs (eth_dma_apb)
);
eth_mac_25g_us_regs_pkg::eth_mac_25g_us_regs__in_t hwif_in;