121 lines
3.5 KiB
Python
121 lines
3.5 KiB
Python
import logging
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import cocotb
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from cocotb.triggers import Timer, FallingEdge
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from cocotb.clock import Clock
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from cocotbext.axi import AxiStreamBus
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from cocotbext.pcie.core import RootComplex
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from cocotbext.pcie.xilinx.us import UltraScalePlusPcieDevice
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CLK_PERIOD = 4
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class TB:
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def __init__(self, dut):
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self.dut = dut
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self.log = logging.getLogger("cocotb.tb")
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self.log.setLevel(logging.INFO)
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self.rc = RootComplex()
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self.dev = UltraScalePlusPcieDevice(
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# configuration options
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pcie_generation=3,
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# pcie_link_width=2,
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# user_clk_frequency=250e6,
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alignment="dword",
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cq_straddle=False,
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cc_straddle=False,
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rq_straddle=False,
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rc_straddle=False,
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rc_4tlp_straddle=False,
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pf_count=1,
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max_payload_size=1024,
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enable_client_tag=True,
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enable_extended_tag=True,
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enable_parity=False,
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enable_rx_msg_interface=False,
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enable_sriov=False,
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enable_extended_configuration=False,
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pf0_msi_enable=True,
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pf0_msi_count=32,
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pf1_msi_enable=False,
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pf1_msi_count=1,
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pf2_msi_enable=False,
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pf2_msi_count=1,
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pf3_msi_enable=False,
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pf3_msi_count=1,
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pf0_msix_enable=False,
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pf0_msix_table_size=0,
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pf0_msix_table_bir=0,
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pf0_msix_table_offset=0x00000000,
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pf0_msix_pba_bir=0,
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pf0_msix_pba_offset=0x00000000,
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pf1_msix_enable=False,
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pf1_msix_table_size=0,
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pf1_msix_table_bir=0,
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pf1_msix_table_offset=0x00000000,
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pf1_msix_pba_bir=0,
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pf1_msix_pba_offset=0x00000000,
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pf2_msix_enable=False,
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pf2_msix_table_size=0,
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pf2_msix_table_bir=0,
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pf2_msix_table_offset=0x00000000,
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pf2_msix_pba_bir=0,
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pf2_msix_pba_offset=0x00000000,
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pf3_msix_enable=False,
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pf3_msix_table_size=0,
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pf3_msix_table_bir=0,
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pf3_msix_table_offset=0x00000000,
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pf3_msix_pba_bir=0,
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pf3_msix_pba_offset=0x00000000,
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# signals
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user_clk=dut.clk_250,
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user_reset=dut.rst_250,
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user_lnk_up=dut.user_lnk_up,
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rq_bus=AxiStreamBus.from_entity(dut.s_axis_rq),
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rc_bus=AxiStreamBus.from_entity(dut.m_axis_rc),
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cq_bus=AxiStreamBus.from_entity(dut.m_axis_cq),
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cc_bus=AxiStreamBus.from_entity(dut.s_axis_cc),
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)
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self.dev.functions[0].configure_bar(0, 64*1024)
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self.rc.make_port().connect(self.dev)
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@cocotb.test
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async def test_sanity(dut):
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tb = TB(dut)
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await FallingEdge(dut.rst_250)
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await Timer(100, 'ns')
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await tb.rc.enumerate()
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mem = tb.rc.mem_pool.alloc_region(16*1024*1024)
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dev = tb.rc.find_device(tb.dev.functions[0].pcie_id)
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await dev.enable_device()
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await dev.set_master()
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dev_bar0 = dev.bar_window[0]
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tb.log.info(dev_bar0.write)
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message = b"Hello, world! This is a long string of data with many letters and words."
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await mem.write(0, message)
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await dev_bar0.write_dword(0x0, 0x00000000)
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await dev_bar0.write_dword(0x4, 0x00000000)
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await dev_bar0.write_dword(0x8, 0x00000000)
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await dev_bar0.write_dword(0xc, len(message))
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await dev_bar0.write_dword(0x10, 0x00000001)
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await Timer(10, "us") |