Byron Lathi 5e3be70f43 Add more register printout

2025-11-23 23:11:38 -08:00

ip

Get it to compile

2025-11-16 23:15:46 -08:00

sim

Update regs

2025-11-23 22:02:53 -08:00

src

Update test code

2025-11-23 22:58:50 -08:00

sub

Get it kind of working again

2025-11-22 17:02:25 -08:00

sw/test

Add more register printout

2025-11-23 23:11:38 -08:00

.gitignore

Get it to compile

2025-11-16 23:15:46 -08:00

.gitmodules

Add eth dma wrapper

2025-11-15 14:37:25 -08:00

alibaba_pcie.yaml

Create project

2025-11-06 21:36:10 -08:00

init_env.sh

Create project

2025-11-06 21:36:10 -08:00

requirements.txt

Update regs

2025-11-23 22:02:53 -08:00

sources.list

Get it kind of working again

2025-11-22 17:02:25 -08:00

Description

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295 KiB

Languages

SystemVerilog 73.2%

Python 12.3%

C 10.9%

Tcl 2.5%

Shell 0.9%

Other 0.2%