Byron Lathi 1099b4ffdd Use 125MHz axi clock, 250 doesn't pass timing

2025-01-26 22:52:55 -08:00

ip

Use 125MHz axi clock, 250 doesn't pass timing

2025-01-26 22:52:55 -08:00

src

Use 125MHz axi clock, 250 doesn't pass timing

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.gitignore

Change pcie clocking

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.gitlab-ci.yml

Add CI

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artix_pcie.yaml

Use 125MHz axi clock, 250 doesn't pass timing

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init_env.sh

Create project and add ip

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requirements.txt

Use 125MHz axi clock, 250 doesn't pass timing

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sources.list

Change pcie clocking

2025-01-26 15:51:19 -08:00

Description

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102 KiB

Languages

Tcl 55.5%

SystemVerilog 41.5%

Shell 3%