First go at adding 65C032
This commit is contained in:
217
src/ca65/instr.c
217
src/ca65/instr.c
@@ -151,6 +151,9 @@ static void PutRTS (const InsDesc* Ins attribute ((unused)));
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static void PutAll (const InsDesc* Ins);
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/* Handle all other instructions */
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static void PutAll32 (const InsDesc* Ins);
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/* Handle all other instructions for the 65C032 */
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static void Put4510 (const InsDesc* Ins);
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/* Handle instructions of 4510 not matching any EATab */
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@@ -729,6 +732,119 @@ static const struct {
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}
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};
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/* Instruction table for the 65C032 (WDC CMOS with 32 bit addressing) */
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static const struct {
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unsigned Count;
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InsDesc Ins[100];
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} InsTab65C032 = {
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/* CAUTION: table must be sorted for bsearch */
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sizeof (InsTab65C032.Ins) / sizeof (InsTab65C032.Ins[0]),
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{
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/* BEGIN SORTED.SH */
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{ "ADC", 0x080A66C, 0x60, 0, PutAll32 },
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{ "AND", 0x080A66C, 0x20, 0, PutAll32 },
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{ "ASL", 0x000006e, 0x02, 1, PutAll32 },
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{ "BBR0", 0x0000000, 0x0F, 0, PutBitBranch },
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{ "BBR1", 0x0000000, 0x1F, 0, PutBitBranch },
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{ "BBR2", 0x0000000, 0x2F, 0, PutBitBranch },
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{ "BBR3", 0x0000000, 0x3F, 0, PutBitBranch },
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{ "BBR4", 0x0000000, 0x4F, 0, PutBitBranch },
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{ "BBR5", 0x0000000, 0x5F, 0, PutBitBranch },
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{ "BBR6", 0x0000000, 0x6F, 0, PutBitBranch },
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{ "BBR7", 0x0000000, 0x7F, 0, PutBitBranch },
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{ "BBS0", 0x0000000, 0x8F, 0, PutBitBranch },
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{ "BBS1", 0x0000000, 0x9F, 0, PutBitBranch },
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{ "BBS2", 0x0000000, 0xAF, 0, PutBitBranch },
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{ "BBS3", 0x0000000, 0xBF, 0, PutBitBranch },
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{ "BBS4", 0x0000000, 0xCF, 0, PutBitBranch },
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{ "BBS5", 0x0000000, 0xDF, 0, PutBitBranch },
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{ "BBS6", 0x0000000, 0xEF, 0, PutBitBranch },
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{ "BBS7", 0x0000000, 0xFF, 0, PutBitBranch },
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{ "BCC", 0x0020000, 0x90, 0, PutPCRel8 },
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{ "BCS", 0x0020000, 0xb0, 0, PutPCRel8 },
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{ "BEQ", 0x0020000, 0xf0, 0, PutPCRel8 },
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{ "BIT", 0x0A0006C, 0x00, 2, PutAll32 },
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{ "BMI", 0x0020000, 0x30, 0, PutPCRel8 },
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{ "BNE", 0x0020000, 0xd0, 0, PutPCRel8 },
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{ "BPL", 0x0020000, 0x10, 0, PutPCRel8 },
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{ "BRA", 0x0020000, 0x80, 0, PutPCRel8 },
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{ "BRK", 0x0800005, 0x00, 6, PutAll32 },
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{ "BVC", 0x0020000, 0x50, 0, PutPCRel8 },
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{ "BVS", 0x0020000, 0x70, 0, PutPCRel8 },
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{ "CLC", 0x0000001, 0x18, 0, PutAll32 },
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{ "CLD", 0x0000001, 0xd8, 0, PutAll32 },
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{ "CLI", 0x0000001, 0x58, 0, PutAll32 },
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{ "CLV", 0x0000001, 0xb8, 0, PutAll32 },
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{ "CMP", 0x080A66C, 0xc0, 0, PutAll32 },
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{ "CPX", 0x080000C, 0xe0, 1, PutAll32 },
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{ "CPY", 0x080000C, 0xc0, 1, PutAll32 },
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{ "DEA", 0x0000001, 0x00, 3, PutAll32 }, /* == DEC */
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{ "DEC", 0x000006F, 0x00, 3, PutAll32 },
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{ "DEX", 0x0000001, 0xca, 0, PutAll32 },
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{ "DEY", 0x0000001, 0x88, 0, PutAll32 },
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{ "EOR", 0x080A66C, 0x40, 0, PutAll32 },
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{ "INA", 0x0000001, 0x00, 4, PutAll32 }, /* == INC */
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{ "INC", 0x000006f, 0x00, 4, PutAll32 },
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{ "INX", 0x0000001, 0xe8, 0, PutAll32 },
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{ "INY", 0x0000001, 0xc8, 0, PutAll32 },
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{ "JMP", 0x0010808, 0x4c, 6, PutAll32 },
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{ "JSR", 0x0000008, 0x20, 7, PutAll32 },
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{ "LDA", 0x080A66C, 0xa0, 0, PutAll32 },
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{ "LDX", 0x080030C, 0xa2, 1, PutAll32 },
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{ "LDY", 0x080006C, 0xa0, 1, PutAll32 },
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{ "LSR", 0x000006F, 0x42, 1, PutAll32 },
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{ "NOP", 0x0000001, 0xea, 0, PutAll32 },
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{ "ORA", 0x080A66C, 0x00, 0, PutAll32 },
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{ "PHA", 0x0000001, 0x48, 0, PutAll32 },
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{ "PHP", 0x0000001, 0x08, 0, PutAll32 },
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{ "PHX", 0x0000001, 0xda, 0, PutAll32 },
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{ "PHY", 0x0000001, 0x5a, 0, PutAll32 },
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{ "PLA", 0x0000001, 0x68, 0, PutAll32 },
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{ "PLP", 0x0000001, 0x28, 0, PutAll32 },
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{ "PLX", 0x0000001, 0xfa, 0, PutAll32 },
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{ "PLY", 0x0000001, 0x7a, 0, PutAll32 },
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{ "RMB0", 0x0000004, 0x07, 1, PutAll32 },
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{ "RMB1", 0x0000004, 0x17, 1, PutAll32 },
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{ "RMB2", 0x0000004, 0x27, 1, PutAll32 },
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{ "RMB3", 0x0000004, 0x37, 1, PutAll32 },
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{ "RMB4", 0x0000004, 0x47, 1, PutAll32 },
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{ "RMB5", 0x0000004, 0x57, 1, PutAll32 },
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{ "RMB6", 0x0000004, 0x67, 1, PutAll32 },
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{ "RMB7", 0x0000004, 0x77, 1, PutAll32 },
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{ "ROL", 0x000006F, 0x22, 1, PutAll32 },
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{ "ROR", 0x000006F, 0x62, 1, PutAll32 },
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{ "RTI", 0x0000001, 0x40, 0, PutAll32 },
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{ "RTS", 0x0000001, 0x60, 0, PutAll32 },
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{ "SBC", 0x080A66C, 0xe0, 0, PutAll32 },
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{ "SEC", 0x0000001, 0x38, 0, PutAll32 },
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{ "SED", 0x0000001, 0xf8, 0, PutAll32 },
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{ "SEI", 0x0000001, 0x78, 0, PutAll32 },
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{ "SMB0", 0x0000004, 0x87, 1, PutAll32 },
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{ "SMB1", 0x0000004, 0x97, 1, PutAll32 },
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{ "SMB2", 0x0000004, 0xA7, 1, PutAll32 },
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{ "SMB3", 0x0000004, 0xB7, 1, PutAll32 },
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{ "SMB4", 0x0000004, 0xC7, 1, PutAll32 },
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{ "SMB5", 0x0000004, 0xD7, 1, PutAll32 },
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{ "SMB6", 0x0000004, 0xE7, 1, PutAll32 },
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{ "SMB7", 0x0000004, 0xF7, 1, PutAll32 },
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{ "STA", 0x000A66C, 0x80, 0, PutAll32 },
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{ "STP", 0x0000001, 0xdb, 0, PutAll32 },
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{ "STX", 0x000010c, 0x82, 1, PutAll32 },
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{ "STY", 0x000002c, 0x80, 1, PutAll32 },
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{ "STZ", 0x000006c, 0x04, 5, PutAll32 },
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{ "TAX", 0x0000001, 0xaa, 0, PutAll32 },
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{ "TAY", 0x0000001, 0xa8, 0, PutAll32 },
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{ "TRB", 0x000000c, 0x10, 1, PutAll32 },
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{ "TSB", 0x000000c, 0x00, 1, PutAll32 },
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{ "TSX", 0x0000001, 0xba, 0, PutAll32 },
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{ "TXA", 0x0000001, 0x8a, 0, PutAll32 },
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{ "TXS", 0x0000001, 0x9a, 0, PutAll32 },
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{ "TYA", 0x0000001, 0x98, 0, PutAll32 },
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{ "WAI", 0x0000001, 0xcb, 0, PutAll32 }
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/* END SORTED.SH */
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}
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};
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/* Instruction table for the 65CE02 */
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static const struct {
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unsigned Count;
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@@ -1622,6 +1738,7 @@ static const InsTable* InsTabs[CPU_COUNT] = {
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(const InsTable*) &InsTab45GS02,
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(const InsTable*) &InsTabW65C02, /* CMOS with WDC extensions */
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(const InsTable*) &InsTab65CE02, /* CMOS with CSG extensions */
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(const InsTable*) &InsTab65C032,
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};
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const InsTable* InsTab = (const InsTable*) &InsTab6502;
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@@ -1786,6 +1903,40 @@ static unsigned char Sweet16ExtBytes[AMSW16I_COUNT] = {
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0, /* AMSW16_REG */
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};
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unsigned char ExtBytes32[AM65I_COUNT] = {
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0, /* Implicit */
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0, /* Accu */
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1, /* Direct */
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4, /* Absolute */
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3, /* Absolute long */
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1, /* Direct,X */
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4, /* Absolute,X */
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3, /* Absolute long,X */
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1, /* Direct,Y */
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4, /* Absolute,Y */
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1, /* (Direct) */
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4, /* (Absolute) */
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1, /* [Direct] */
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1, /* (Direct),Y */
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1, /* [Direct],Y */
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1, /* (Direct,X) */
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4, /* (Absolute,X) */
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1, /* Relative short */
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2, /* Relative long */
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1, /* r,s */
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1, /* (r,s),y */
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1, /* Immidiate accu */
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1, /* Immidiate index */
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1, /* Immidiate byte */
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2, /* Blockmove (65816) */
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7, /* Block transfer (HuC6280) */
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4, /* Absolute Indirect long */
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2, /* Immidiate word */
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2, /* Direct, Relative short */
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1, /* Special Page */
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1, /* [Direct],z */
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0, /* Q */
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};
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/*****************************************************************************/
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@@ -1849,15 +2000,23 @@ static int EvalEA (const InsDesc* Ins, EffAddr* A)
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}
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/* Check the size */
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switch (ED.AddrSize) {
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if (CPU == CPU_65C032) {
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switch (ED.AddrSize) {
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case ADDR_SIZE_LONG:
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A->AddrModeSet &= ~AM65_SET_ZP;
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break;
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}
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} else {
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switch (ED.AddrSize) {
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case ADDR_SIZE_ABS:
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A->AddrModeSet &= ~AM65_SET_ZP;
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break;
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case ADDR_SIZE_ABS:
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A->AddrModeSet &= ~AM65_SET_ZP;
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break;
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case ADDR_SIZE_FAR:
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A->AddrModeSet &= ~(AM65_SET_ZP | AM65_SET_ABS);
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break;
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case ADDR_SIZE_FAR:
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A->AddrModeSet &= ~(AM65_SET_ZP | AM65_SET_ABS);
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break;
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}
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}
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/* Free any resource associated with the expression desc */
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@@ -1950,6 +2109,39 @@ static void EmitCode (EffAddr* A)
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}
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}
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static void EmitCode32 (EffAddr* A)
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/* Output code for the data in A */
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{
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/* Check how many extension bytes are needed and output the instruction */
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switch (ExtBytes32[A->AddrMode]) {
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case 0:
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Emit0 (A->Opcode);
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break;
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case 1:
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Emit1 (A->Opcode, A->Expr);
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break;
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case 2:
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Internal ("65C032 has no 3 byte instructions!");
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break;
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case 3:
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Internal ("65C032 has no 4 byte instructions!");
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break;
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case 4:
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Emit4 (A->Opcode, A->Expr);
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break;
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default:
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Internal ("Invalid operand byte count: %u", ExtBytes[A->AddrMode]);
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}
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}
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static void PutLDM_m740 (const InsDesc* Ins)
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{
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@@ -2416,6 +2608,17 @@ static void PutAll (const InsDesc* Ins)
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}
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}
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static void PutAll32 (const InsDesc* Ins)
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/* Handle all other instructions for the 65C032 */
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{
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EffAddr A;
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/* Evaluate the Addressing Mode Used */
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if (EvalEA (Ins, &A)) {
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/* No error, output code */
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EmitCode32 (&A);
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}
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}
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static void Emit4510 (EffAddr* A) {
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@@ -219,6 +219,7 @@ static void DefineCpuSymbols (void)
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NewSymbol ("CPU_ISET_45GS02", CPU_ISET_45GS02);
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NewSymbol ("CPU_ISET_W65C02", CPU_ISET_W65C02);
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NewSymbol ("CPU_ISET_65CE02", CPU_ISET_65CE02);
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NewSymbol ("CPU_ISET_65C032", CPU_ISET_65C032);
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/* Additional ones from cpu.mac. Not sure how useful they are after the
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** changes from #2751.
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@@ -131,6 +131,12 @@ void Emit3 (unsigned char OPC, ExprNode* Expr)
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EmitFarAddr (Expr);
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}
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void Emit4 (unsigned char OPC, ExprNode* Expr)
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/* Emit an instruction with a four byte argument */
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{
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Emit0 (OPC);
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EmitDWord (Expr);
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}
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void EmitSigned (ExprNode* Expr, unsigned Size)
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@@ -62,6 +62,9 @@ void Emit2 (unsigned char OPC, ExprNode* Value);
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void Emit3 (unsigned char OPC, ExprNode* Expr);
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/* Emit an instruction with a three byte argument */
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void Emit4 (unsigned char OPC, ExprNode* Expr);
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/* Emit an instruction with a four byte argument */
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void EmitSigned (ExprNode* Expr, unsigned Size);
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/* Emit a signed expression with the given size */
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@@ -413,6 +413,7 @@ static void DefineCpuMacros (void)
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DefineNumericMacro ("__CPU_ISET_65C02__", CPU_ISET_65C02);
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DefineNumericMacro ("__CPU_ISET_W65C02__", CPU_ISET_W65C02);
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DefineNumericMacro ("__CPU_ISET_65CE02__", CPU_ISET_65CE02);
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DefineNumericMacro ("__CPU_ISET_65C032__", CPU_ISET_65C032);
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DefineNumericMacro ("__CPU_ISET_65816__", CPU_ISET_65816);
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DefineNumericMacro ("__CPU_ISET_HUC6280__", CPU_ISET_HUC6280);
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DefineNumericMacro ("__CPU_ISET_4510__", CPU_ISET_4510);
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@@ -68,6 +68,7 @@ const char* CPUNames[CPU_COUNT] = {
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"45GS02",
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"W65C02", /* CMOS with WDC extensions */
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"65CE02", /* CMOS with CSG extensions */
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"65C032", /* CMOS with 32 bit addressing */
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};
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/* Tables with CPU instruction sets
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@@ -102,6 +103,8 @@ const unsigned CPUIsets[CPU_COUNT] = {
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CPU_ISET_W65C02 | CPU_ISET_6502 | CPU_ISET_65SC02 | CPU_ISET_65C02,
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/* CPU_65CE02 */
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CPU_ISET_65CE02 | CPU_ISET_6502 | CPU_ISET_65C02,
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/* CPU_65C032 */
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CPU_ISET_65C032,
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};
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/* Defines for capabilities. Currently the entries are uint32_ts but the table
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@@ -66,7 +66,8 @@ typedef enum {
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CPU_45GS02, /* CPU of MEGA65 */
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CPU_W65C02, /* CMOS with WDC extensions */
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CPU_65CE02, /* CMOS with CSG extensions */
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CPU_COUNT /* Number of different CPUs */
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CPU_65C032, /* CMOS with 32 bit addressing */
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CPU_COUNT, /* Number of different CPUs */
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} cpu_t;
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/* CPU instruction sets */
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@@ -84,7 +85,8 @@ enum {
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CPU_ISET_4510 = 1 << CPU_4510,
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CPU_ISET_45GS02 = 1 << CPU_45GS02,
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CPU_ISET_W65C02 = 1 << CPU_W65C02,
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CPU_ISET_65CE02 = 1 << CPU_65CE02
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CPU_ISET_65CE02 = 1 << CPU_65CE02,
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CPU_ISET_65C032 = 1 << CPU_65C032,
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};
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/* CPU used */
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0
test/asm/opcodes/65c032-opcodes.ref
Normal file
0
test/asm/opcodes/65c032-opcodes.ref
Normal file
258
test/asm/opcodes/65c032-opcodes.s
Normal file
258
test/asm/opcodes/65c032-opcodes.s
Normal file
@@ -0,0 +1,258 @@
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.setcpu "65C032"
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brk
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ora ($12,x)
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.byte $02
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.byte $03
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tsb $12
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ora $12
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asl $12
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rmb0 $12
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php
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ora #$12
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asl a
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.byte $0B
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tsb $3456789a
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ora $3456789a
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asl $3456789a
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bbr0 $12,*+122
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bpl *+122
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ora ($12),y
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ora ($12)
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.byte $13
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trb $12
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ora $12,x
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asl $12,x
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rmb1 $12
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clc
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ora $3456789a,y
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inc a
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.byte $1B
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trb $3456789a
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ora $3456789a,x
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asl $3456789a,x
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bbr1 $12,*+122
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jsr $3456789a
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and ($12,x)
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.byte $22
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.byte $23
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bit $12
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and $12
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rol $12
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rmb2 $12
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plp
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and #$12
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rol a
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.byte $2B
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bit $3456789a
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and $3456789a
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rol $3456789a
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bbr2 $12,*+122
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bmi *+122
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and ($12),y
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and ($12)
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.byte $33
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bit $12,x
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and $12,x
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rol $12,x
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rmb3 $12
|
||||
sec
|
||||
and $3456789a,y
|
||||
dec a
|
||||
.byte $3B
|
||||
bit $3456789a,x
|
||||
and $3456789a,x
|
||||
rol $3456789a,x
|
||||
bbr3 $12,*+122
|
||||
rti
|
||||
eor ($12,x)
|
||||
.byte $42
|
||||
.byte $43
|
||||
.byte $44
|
||||
eor $12
|
||||
lsr $12
|
||||
rmb4 $12
|
||||
pha
|
||||
eor #$12
|
||||
lsr a
|
||||
.byte $4B
|
||||
jmp $3456789a
|
||||
eor $3456789a
|
||||
lsr $3456789a
|
||||
bbr4 $12,*+122
|
||||
bvc *+122
|
||||
eor ($12),y
|
||||
eor ($12)
|
||||
.byte $53
|
||||
.byte $54
|
||||
eor $12,x
|
||||
lsr $12,x
|
||||
rmb5 $12
|
||||
cli
|
||||
eor $3456789a,y
|
||||
phy
|
||||
.byte $5B
|
||||
.byte $5C
|
||||
eor $3456789a,x
|
||||
lsr $3456789a,x
|
||||
bbr5 $12,*+122
|
||||
rts
|
||||
adc ($12,x)
|
||||
.byte $62
|
||||
.byte $63
|
||||
stz $12
|
||||
adc $12
|
||||
ror $12
|
||||
rmb6 $12
|
||||
pla
|
||||
adc #$12
|
||||
ror a
|
||||
.byte $6B
|
||||
jmp ($3456789a)
|
||||
adc $3456789a
|
||||
ror $3456789a
|
||||
bbr6 $12,*+122
|
||||
bvs *+122
|
||||
adc ($12),y
|
||||
adc ($12)
|
||||
.byte $73
|
||||
stz $12,x
|
||||
adc $12,x
|
||||
ror $12,x
|
||||
rmb7 $12
|
||||
sei
|
||||
adc $3456789a,y
|
||||
ply
|
||||
.byte $7B
|
||||
jmp ($3456789a,x)
|
||||
adc $3456789a,x
|
||||
ror $3456789a,x
|
||||
bbr7 $12,*+122
|
||||
bra *+122
|
||||
sta ($12,x)
|
||||
.byte $82
|
||||
.byte $83
|
||||
sty $12
|
||||
sta $12
|
||||
stx $12
|
||||
smb0 $12
|
||||
dey
|
||||
bit #$12
|
||||
txa
|
||||
.byte $8B
|
||||
sty $3456789a
|
||||
sta $3456789a
|
||||
stx $3456789a
|
||||
bbs0 $12,*+122
|
||||
bcc *+122
|
||||
sta ($12),y
|
||||
sta ($12)
|
||||
.byte $93
|
||||
sty $12,x
|
||||
sta $12,x
|
||||
stx $12,y
|
||||
smb1 $12
|
||||
tya
|
||||
sta $3456789a,y
|
||||
txs
|
||||
.byte $9B
|
||||
stz $3456789a
|
||||
sta $3456789a,x
|
||||
stz $3456789a,x
|
||||
bbs1 $12,*+122
|
||||
ldy #$12
|
||||
lda ($12,x)
|
||||
ldx #$12
|
||||
.byte $A3
|
||||
ldy $12
|
||||
lda $12
|
||||
ldx $12
|
||||
smb2 $12
|
||||
tay
|
||||
lda #$12
|
||||
tax
|
||||
.byte $AB
|
||||
ldy $3456789a
|
||||
lda $3456789a
|
||||
ldx $3456789a
|
||||
bbs2 $12,*+122
|
||||
bcs *+122
|
||||
lda ($12),y
|
||||
lda ($12)
|
||||
.byte $B3
|
||||
ldy $12,x
|
||||
lda $12,x
|
||||
ldx $12,y
|
||||
smb3 $12
|
||||
clv
|
||||
lda $3456789a,y
|
||||
tsx
|
||||
.byte $BB
|
||||
ldy $3456789a,x
|
||||
lda $3456789a,x
|
||||
ldx $3456789a,y
|
||||
bbs3 $12,*+122
|
||||
cpy #$12
|
||||
cmp ($12,x)
|
||||
.byte $C2
|
||||
.byte $C3
|
||||
cpy $12
|
||||
cmp $12
|
||||
dec $12
|
||||
smb4 $12
|
||||
iny
|
||||
cmp #$12
|
||||
dex
|
||||
.byte $CB
|
||||
cpy $3456789a
|
||||
cmp $3456789a
|
||||
dec $3456789a
|
||||
bbs4 $12,*+122
|
||||
bne *+122
|
||||
cmp ($12),y
|
||||
cmp ($12)
|
||||
.byte $D3
|
||||
.byte $D4
|
||||
cmp $12,x
|
||||
dec $12,x
|
||||
smb5 $12
|
||||
cld
|
||||
cmp $3456789a,y
|
||||
phx
|
||||
.byte $DB
|
||||
.byte $DC
|
||||
cmp $3456789a,x
|
||||
dec $3456789a,x
|
||||
bbs5 $12,*+122
|
||||
cpx #$12
|
||||
sbc ($12,x)
|
||||
.byte $E2
|
||||
.byte $E3
|
||||
cpx $12
|
||||
sbc $12
|
||||
inc $12
|
||||
smb6 $12
|
||||
inx
|
||||
sbc #$12
|
||||
nop
|
||||
.byte $EB
|
||||
cpx $3456789a
|
||||
sbc $3456789a
|
||||
inc $3456789a
|
||||
bbs6 $12,*+122
|
||||
beq *+122
|
||||
sbc ($12),y
|
||||
sbc ($12)
|
||||
.byte $F3
|
||||
.byte $F4
|
||||
sbc $12,x
|
||||
inc $12,x
|
||||
smb7 $12
|
||||
sed
|
||||
sbc $3456789a,y
|
||||
plx
|
||||
.byte $FB
|
||||
.byte $FC
|
||||
sbc $3456789a,x
|
||||
inc $3456789a,x
|
||||
bbs7 $12,*+122
|
||||
Reference in New Issue
Block a user