Add hexdump methods to AXI RAM models
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@@ -32,6 +32,7 @@ from collections import deque
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from .constants import *
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from .axil_channels import *
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from .utils import hexdump, hexdump_str
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class AxiLiteRamWrite(object):
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@@ -70,6 +71,12 @@ class AxiLiteRamWrite(object):
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self.mem.seek(address)
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self.mem.write(bytes(data))
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def hexdump(self, address, length, prefix=""):
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hexdump(self.mem, address, length, prefix=prefix)
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def hexdump_str(self, address, length, prefix=""):
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return hexdump_str(self.mem, address, length, prefix=prefix)
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async def _process_write(self):
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while True:
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await self.aw_channel.wait()
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@@ -140,6 +147,12 @@ class AxiLiteRamRead(object):
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self.mem.seek(address)
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self.mem.write(bytes(data))
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def hexdump(self, address, length, prefix=""):
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hexdump(self.mem, address, length, prefix=prefix)
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def hexdump_str(self, address, length, prefix=""):
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return hexdump_str(self.mem, address, length, prefix=prefix)
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async def _process_read(self):
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while True:
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await self.ar_channel.wait()
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@@ -185,3 +198,9 @@ class AxiLiteRam(object):
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self.mem.seek(address)
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self.mem.write(bytes(data))
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def hexdump(self, address, length, prefix=""):
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hexdump(self.mem, address, length, prefix=prefix)
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def hexdump_str(self, address, length, prefix=""):
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return hexdump_str(self.mem, address, length, prefix=prefix)
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