Change target clock to 400MHz
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@@ -101,4 +101,8 @@ Lets just leave it for now even if its overkill. The hardware would support up t
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we designed a custom board for it (or 120 if we used FMC connectors).
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If we only use a single quarter round multiplexed between all 4, then the same
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quarter round module can have 2 different blocks going through it at once.
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quarter round module can have 2 different blocks going through it at once.
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The new one multiplexes 4 quarter rounds between 1 QR module which reduces the
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logic usage down to only 46k le, of which the vast majority is flops (2k ff per round,
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0.5k lut)
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