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Reduce number of flops in chacha from 8 to 2

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This commit is contained in:
Byron Lathi
2026-07-27 20:19:21 -07:00
parent 89a8087003
commit f5e7b843b1
5 changed files with 80 additions and 46 deletions
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2
ChaCha20_Poly1305_64/chacha20poly1305_timing_test/chacha20poly1305_timing_test.xml
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@@ -1,5 +1,5 @@
<?xml version="1.0" encoding="UTF-8"?>
<efx:project name="chacha20poly1305_timing_test" description="" last_change="1785206158" sw_version="2025.1.110" last_run_state="pass" last_run_flow="bitstream" config_result_in_sync="true" design_ood="sync" place_ood="sync" route_ood="sync" xmlns:efx="http://www.efinixinc.com/enf_proj" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.efinixinc.com/enf_proj enf_proj.xsd">
<efx:project name="chacha20poly1305_timing_test" description="" last_change="1785208404" sw_version="2025.1.110" last_run_state="pass" last_run_flow="bitstream" config_result_in_sync="true" design_ood="sync" place_ood="sync" route_ood="sync" xmlns:efx="http://www.efinixinc.com/enf_proj" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.efinixinc.com/enf_proj enf_proj.xsd">
<efx:device_info>
<efx:family name="Titanium"/>
<efx:device name="Ti375C529"/>

16
ChaCha20_Poly1305_64/src/chacha20_poly1305_input_fsm.sv
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@@ -53,14 +53,16 @@ always_comb begin
if (i_valid) begin
chacha_valid = '1;
state_next = ACTIVE1;
counter_next = counter + 1;
if (chacha_ready) begin
state_next = ACTIVE1;
counter_next = counter + 1;
last_flag_next = i_last;
// if the first beat is also the last, then lower ready so that
// we run chacha for 2 cycles instead of 1, and keep the key valid.
if (i_last) begin
o_short_packet = '1;
last_flag_next = i_last;
// if the first beat is also the last, then lower ready so that
// we run chacha for 2 cycles instead of 1, and keep the key valid.
if (i_last) begin
o_short_packet = '1;
end
end
end
end

1
ChaCha20_Poly1305_64/src/chacha20_poly1305_mid_fsm.sv
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@@ -73,6 +73,7 @@ always_comb begin
o_metadata_read = '0;
o_ciphertext = '0;
o_ciphertext_countm1 = '0;
o_post = '0;
case (state)

104
ChaCha20_Poly1305_64/src/chacha20_qr.sv
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@@ -18,12 +18,40 @@ module chacha20_qr #(
output logic [31:0] a_o, b_o, c_o, d_o
);
logic [31:0] a_int_0;
logic [31:0] b_int_0;
logic [31:0] c_int_0;
logic [31:0] d_int_0;
logic [31:0] a_int_1;
logic [31:0] b_int_1;
logic [31:0] c_int_1;
logic [31:0] d_int_1;
logic [31:0] a_int [7];
logic [31:0] b_int [7];
logic [31:0] c_int [7];
logic [31:0] d_int [7];
logic [31:0] a_int_2;
logic [31:0] b_int_2;
logic [31:0] c_int_2;
logic [31:0] d_int_2;
logic [31:0] a_int_3;
logic [31:0] b_int_3;
logic [31:0] c_int_3;
logic [31:0] d_int_3;
logic [31:0] a_int_4;
logic [31:0] b_int_4;
logic [31:0] c_int_4;
logic [31:0] d_int_4;
logic [31:0] a_int_5;
logic [31:0] b_int_5;
logic [31:0] c_int_5;
logic [31:0] d_int_5;
logic [31:0] a_int_6;
logic [31:0] b_int_6;
logic [31:0] c_int_6;
logic [31:0] d_int_6;
logic [6:0] valid_sr;
@@ -33,62 +61,62 @@ logic [6:0] valid_sr;
assign o_ready = i_ready;
always_ff @(posedge i_clk) begin
always @(posedge i_clk) begin
if (i_rst) begin
valid_sr <= '0;
end else begin
if (i_ready) begin
// 1. Update A
a_int[0] <= a_i + b_i;
b_int[0] <= b_i;
c_int[0] <= c_i;
d_int[0] <= d_i;
a_int_0 <= a_i + b_i;
b_int_0 <= b_i;
c_int_0 <= c_i;
d_int_0 <= d_i;
// 2. Update D
a_int[1] <= a_int[0];
b_int[1] <= b_int[0];
c_int[1] <= c_int[0];
d_int[1] <= `ROTL(a_int[0], 16) ^ `ROTL(d_int[0], 16);
a_int_1 = a_int_0;
b_int_1 = b_int_0;
c_int_1 = c_int_0;
d_int_1 = `ROTL(a_int_0, 16) ^ `ROTL(d_int_0, 16);
// 3. Update C
a_int[2] <= a_int[1];
b_int[2] <= b_int[1];
c_int[2] <= c_int[1] + d_int[1];
d_int[2] <= d_int[1];
a_int_2 = a_int_1;
b_int_2 = b_int_1;
c_int_2 = c_int_1 + d_int_1;
d_int_2 = d_int_1;
// 4. Update B
a_int[3] <= a_int[2];
b_int[3] <= `ROTL(b_int[2], 12) ^ `ROTL(c_int[2], 12);
c_int[3] <= c_int[2];
d_int[3] <= d_int[2];
a_int_3 = a_int_2;
b_int_3 = `ROTL(b_int_2, 12) ^ `ROTL(c_int_2, 12);
c_int_3 = c_int_2;
d_int_3 = d_int_2;
// 5. Update A
a_int[4] <= a_int[3] + b_int[3];
b_int[4] <= b_int[3];
c_int[4] <= c_int[3];
d_int[4] <= d_int[3];
a_int_4 = a_int_3 + b_int_3;
b_int_4 = b_int_3;
c_int_4 = c_int_3;
d_int_4 = d_int_3;
// 6. Update D
a_int[5] <= a_int[4];
b_int[5] <= b_int[4];
c_int[5] <= c_int[4];
d_int[5] <= `ROTL(a_int[4], 8) ^ `ROTL(d_int[4], 8);
a_int_5 = a_int_4;
b_int_5 = b_int_4;
c_int_5 = c_int_4;
d_int_5 = `ROTL(a_int_4, 8) ^ `ROTL(d_int_4, 8);
// 7. Update C
a_int[6] <= a_int[5];
b_int[6] <= b_int[5];
c_int[6] <= c_int[5] + d_int[5];
d_int[6] <= d_int[5];
a_int_6 = a_int_5;
b_int_6 = b_int_5;
c_int_6 = c_int_5 + d_int_5;
d_int_6 = d_int_5;
// 8. Update B
a_o <= a_int[6];
b_o <= `ROTL(b_int[6], 7) ^ `ROTL(c_int[6], 7);
c_o <= c_int[6];
d_o <= d_int[6];
a_o <= a_int_6;
b_o <= `ROTL(b_int_6, 7) ^ `ROTL(c_int_6, 7);
c_o <= c_int_6;
d_o <= d_int_6;
// Simultaneously, update valid_sr;
valid_sr <= {valid_sr[5:0], i_valid};
o_valid <= valid_sr[6];
o_valid <= valid_sr[0];
end
end
end

3
ChaCha20_Poly1305_64/src/poly1305_ll_stage.sv
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@@ -120,8 +120,11 @@ always_comb begin
sum_next = '0;
product_next = '0;
final_sum_next = '0;
r_reg_next = r_reg;
s_reg_next = s_reg;
s_reg_2_next = s_reg_2;
data_len_next = data_len;