Improve the SDIO tuning algorithm to increase stability and
performance under low-temperature conditions.
Signed-off-by: Swee Aun Khor <sakhor@efinixinc.com>
The driver supports UHS-I bus speed modes: SDR25, DDR50, and SDR104.
By default, the controller operates in SDR25 mode. Higher-speed modes
can be enabled via the Device Tree by adding the following properties
to the SDIO node:
- sd-uhs-ddr50
- sd-uhs-sdr104
When these properties are present, the driver negotiates the highest
supported UHS mode with the card and host.
Signed-off-by: Swee Aun Khor <sakhor@efinixinc.com>
Ti375C529 use spi flash is25wp512m. This spi flash did not recognize by
the kernel as it missing the device id within spi-flash device driver.
Signed-off-by: Mohamad Noor Alim Hussin <mnalim@efinixinc.com>
SPI flash require 8 dummy clock cycle during read operation
before it can receive the data. However, this might not needed
by other SPI device such as SD card when operate in SPI mode.
Thus, a new device tree property called 'dummy-cycle' is added
to resolve this issue. This optional device tree property is
needed for controlling the SPI flash device.
Signed-off-by: Mohamad Noor Alim Hussin <mnalim@efinixinc.com>
The PHY has an issue when operating in gigabit slave mode.
It not able to transmit or receive any packet in the slave
mode. Thus, this patch enable the master mode configuration
of the phy.
Signed-off-by: Mohamad Noor Alim Hussin <mnalim@efinixinc.com>
The ALDPS mode will stop the pll to save the power.
This cause the kernel crash whenever it tried to read
or write to the phy due to phy is power off state.
Disable this mode to let the phy keep alive.
Signed-off-by: Mohamad Noor Alim Hussin <mnalim@efinixinc.com>
