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  • 4-axil-shadow-register
  • master default protected
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Created with Raphaël 2.2.017Aug31Jul208Jun3229May2424Apr232221117Mar1615141031Jan3028272623171627Dec261816Fix sources.listmastermasterAdd default values for parametersSynthesis fixes4-axil-shadow-r…4-axil-shadow-registerRefactor for super6502First go at shadow registersAdd sources.listMake fifo work betterMake sync fifo output synchrnous, add fwft fifoFix parameter namesEmpty value is 1 at resetParameterize endian flip moreAdd endian flipPipeline axi ramFix inferred latches in apb decoderMerge branch '3-apb4_decoder' into 'master'Fix bug where AWREADY should be lowGate signals on pselFix syntax, add default valuesAdd apb4 decoderAlways have WREADYfix various axi issuesRegister output of fifo to get it to synthesize into bramMerge branch '2-add-axi4-lite-to-apb-adapter' into 'master'Fix bug with fifo where memory access pointers were not parameterizedFix bug with 8 bit to 32 bit address conversionFix enableFix rdata length mismatchDon't forget wstrbAdd axi4_lite_to_apb4Remove protAdd axi4-lite interfaceAdd states to the rom to handle axi betterAdd reset parameter to ff cdcAdd zero init ram option, rename rom optionsModifications for synthesisUpdate ram to support writes betterGet writes working for the ramAdd axi ramUse only low bytes of w/r_ptrAdd rom