M2s DMA

created branch 1-m2s-dma to address this issue

mentioned in merge request !1 (merged)

added 1 design

The interface coming off of the FSM is axi lite, but can be read only for the m2s dma.

So kind of related kind of not. If we are to use the axil-xbar, we need to include that file so it gets built. However, we can only include the file once.

We could have it as a submodule, which we will probably have anyway, but then we need to not include it

We could not include it, and require the whoever instantiates this includes it

We could have it as a submodule but only for verification, and otherwise whatever instantiates this has to provide it.

The last option is provided by including it s a submodule, but only including the sources.list in the sim sources, not in the RTL sources.

I vote for the 3rd option. It does require then that the super project is also using that IP, but it probably is anyway, and if not then it just has to include it. This does mean that it is included twice, but its not too large and it won't be used anyway except for running dma specific tests.

Are we having multiple channels to try and justify using a common wrapper? Because if the common part does not add anything, then we should just get rid of it. You are talking about this weird dependency loop that doesn't need to be here if we just expose a single channel and thats it. There is nothing offered by combining them together except making it harder to get to synthesize. Integration is marginally harder but all that was gained was a simple register decoder, and the need to put an axil xbar before/after the DMA.

Ok yeah so we got it very simply. Now we can try to integrate it?

mentioned in commit 84b9e384

closed with merge request !1 (merged)