mapping the framebuffer uses the address from mbi

before this it used a constant, which might not always be the case.

kernel/kernel.c

@@ -95,12 +95,14 @@ void entry(unsigned long magic, unsigned long addr) {
         ltr(KERNEL_TSS);
     }
 
-	printf("framebuffer addr %x %x\n", mbi->framebuffer_info.framebuffer_addr_high, mbi->framebuffer_info.framebuffer_addr_low);
-	printf("framebuffer size %d\n", mbi->framebuffer_info.framebuffer_pitch * mbi->framebuffer_info.framebuffer_height);
-
 	init_idt_exception();
 
+	// we can't use mbi after paging is initialized since its not in kernel memory
+	uint32_t fb_addr = mbi->framebuffer_info.framebuffer_addr_low;
+
 	init_paging();
+	map_large(fb_addr, fb_addr);
+
 	printf("Does this work?\n");
 
 	i8259_init();

kernel/paging.c

@@ -9,11 +9,15 @@ void init_paging()
 	page_directory[1].g = 1; //dont flush kerneal code from virtual memory
 	PDIR_SET_ADDR(KERNAL_PD_ENTRY, KERNAL_ADDR);
 
+	/*	
+	// it isn't guaranteed that the fb will always be at this address
 	page_directory[0x3f4].present = 1;
 	page_directory[0x3f4].rw = 1;
 	page_directory[0x3f4].ps = 1;
 	page_directory[0x3f4].g = 1;
 	PDIR_SET_ADDR(0x3f4, 0xFD000000);
+	*/
+	
 
 	//IA-32 Intel Page 57
 
@@ -21,9 +25,12 @@ void init_paging()
 	* to 4 KBytes when clear. 
 	*/
 	asm volatile ("     \n\
-	movl %cr4, %eax     \n\
-	orl $0x10, %eax     \n\
-	movl %eax, %cr4"
+	movl %%cr4, %%eax     \n\
+	orl $0x10, %%eax     \n\
+	movl %%eax, %%cr4"
+	:
+	:
+	: "eax"
 	);
 
 
@@ -33,13 +40,49 @@ void init_paging()
 	movl %%eax, %%cr3"
 	:
 	: "r" (page_directory)
+	: "eax"
 	);
 
 	/*Enable PE and PG in CR0*/
 	asm volatile ("         \n\
-	movl %cr0, %eax         \n\
-	orl $0x80000001, %eax   \n\
-	movl %eax, %cr0"
+	movl %%cr0, %%eax         \n\
+	orl $0x80000001, %%eax   \n\
+	movl %%eax, %%cr0"
+	:
+	:
+	: "eax"
 	);
 
-}
\ No newline at end of file
+}
+
+int32_t map_large(uint32_t v_addr, uint32_t p_addr)
+{
+	page_directory[0x3f4].present = 1;
+	page_directory[0x3f4].rw = 1;
+	page_directory[0x3f4].ps = 1;
+	page_directory[0x3f4].g = 1;
+	PDIR_SET_ADDR(0x3f4, 0xFD000000);
+
+	FLUSH_TLB();
+}
+
+int32_t map_2large(uint32_t v_addr, uint32_t p_addr)
+{
+    uint32_t dir_index = (uint32_t)v_addr >> DIR_BIT_OFF;
+
+    if (dir_index > 1023)
+	return -1;
+
+    /* fill page dir table accordingly */
+    page_directory[dir_index].present = 1;
+    page_directory[dir_index].rw = 1;
+    page_directory[dir_index].us = 1;
+    page_directory[dir_index].ps = 1; //4mb page
+    PDIR_SET_ADDR(dir_index, p_addr);
+
+    /* clear cache */
+    FLUSH_TLB();
+    
+
+    return 0;
+}

kernel/paging.h

@@ -70,11 +70,11 @@ extern ptable_entry_t page_table[PT_SIZE];
 /* Initialize Paging */
 void init_paging(void);
 
-int32_t map_large(uint32_t* v_addr, uint32_t* p_addr);
+int32_t map_large(uint32_t v_addr, uint32_t p_addr);
 int32_t map_vmem(uint8_t** start);
 int32_t unmap_small(uint32_t* v_addr);
 int32_t unmap_large(uint32_t* v_addr);
 
-#define FLUSH_TLB() asm volatile ("movl %%cr3, %%eax \n movl %%eax, %%cr3"::: "%eax")
+#define FLUSH_TLB() asm volatile ("movl %%cr3, %%eax \n movl %%eax, %%cr3"::: "eax")
 
 #endif /* PAGING_H */