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Commit 40fe95ea authored by Byron Lathi's avatar Byron Lathi
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Add checksum calc to fpga sources

parent f742d9d8
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2 merge requests!75Resolve "Calculate TCP Checksum",!74Resolve "Network Processor"
Pipeline #708 passed
Stage: build
Stage: sim
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hw/super6502_fpga/super6502_fpga.xml
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......@@ -199,6 +199,7 @@
<efx:design_file name="src/sub/network_processor/src/tcp_dest_decap.sv" version="default" library="default" />
<efx:design_file name="src/sub/network_processor/src/tcp_packet_generator.sv" version="default" library="default" />
<efx:design_file name="src/sub/network_processor/src/tcp_tx_ctrl.sv" version="default" library="default" />
<efx:design_file name="src/sub/network_processor/src/checksum_calc.sv" version="default" library="default" />
<efx:design_file name="src/sub/interfaces/axil_intf.sv" version="default" library="default" />
<efx:design_file name="src/sub/interfaces/axis_intf.sv" version="default" library="default" />
<efx:design_file name="src/sub/interfaces/ip_intf.sv" version="default" library="default" />
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