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Byron Lathi
super6502
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7c2aab59dcb0e935713648a0dc78d13844e72461
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Branches
20
101-new-kernel
102-new-bootloader
14-terminal-driver
15-parse-the-read-only-file-system
16-realtime-clock-driver
17-support-system-calls
56-sd-card-dma
63-do-ddr
68-fpga-images-randomly-do-not-work
69-gtkwave-function-annotation
70-big-kernel-doesn-t-work
78-add-basic-software
90-use-external-axi-ip
98-new-dev-board
99-respond-to-fin-packet
efinix_board
efinix_sdcard
master
default
protected
new_board
not_spii
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1
final_native
21 results
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Created with Raphaël 2.2.0
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Add rtc to efinix project
Update RTC code test
Add rtc code test
Merge branch '50-full-chip-sims-should-be-optional-and-have-better-finish-conditions' into 'master'
Make full sim manual
Merge branch '11-create-rtc' into 'master'
Merge branch '47-add-license-and-readme' into 'master'
Merge branch '48-reduce-sim-time-for-full-sim' into 'master'
Merge branch 'master' into 48-reduce-sim-time-for-full-sim
Merge branch 'master' into 47-add-license-and-readme
Merge from main
Merge branch '10-interrupt-controller' into 'master'
Update README
Add README
Add LICENSE
Reduce sim time for full sim
Add toolchain dependency to sim
Check all edge interrupts
Add irq code tb
Implement RTC
Merge branch '10-interrupt-controller' into 'master'
Test interrupt priority
Fix edge trigger, reorganize testbench
Fix level triggered test, add to ci
Fix makefile, fix how interrupts are triggered
Demonstrate basic interrupt functionality
Add skeleton of interrupt controller
Add beginnings of interrupt controller
Update diagram again
Second diagram
Add first design
Merge branch 'long_sim' into 'master'
Add back long string
Fix off by 1 in o65 option decoding
Add some CLCs before ADCs
Skip the copydata in kernel setup
Update kernel makefile, test more kernel code
Do a more sane string print first
Up sim time
Make kernel as part of full chip sim
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