Add basic project with cpu, ram and rom

2024-03-02 22:46:48 -08:00
parent 0a0394ae33
commit 0752220b0e
15 changed files with 1019 additions and 0 deletions
--- a/hw/super6502_fpga/constraints/constraints.sdc
+++ b/hw/super6502_fpga/constraints/constraints.sdc
@@ -0,0 +1,5 @@
+create_clock -period 5.00 i_sdrclk
+create_clock -period 5.00 i_tACclk
+create_clock -period 10.00 i_sysclk
+
+create_generated_clock -source i_sysclk -divide_by 50 clk_cpu