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Add sdram, don't think it works though

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This commit is contained in:
Byron Lathi
2024-03-03 20:43:37 -08:00
parent 78dfb01bd7
commit 10a72d8e1f
17 changed files with 6256 additions and 31 deletions
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4
hw/super6502_fpga/src/sim/Makefile
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@@ -4,6 +4,8 @@ SIM_SRCS_LIST=sources.list
SUPER6502_FPGA_SOURCES=$(foreach file, $(shell cat $(FPGA_SRCS_LIST)), ../../$(file))
SIM_SOURCES=$(shell cat $(SIM_SRCS_LIST))
INCLUDE=include/sdram_controller_define.vh
TB_NAME=sim_top
COPY_FILES=addr_map.mem init_hex.mem
@@ -14,7 +16,7 @@ waves: $(TB_NAME)
./$(TB_NAME) -fst
$(TB_NAME): $(SUPER6502_FPGA_SOURCES) $(SIM_SOURCES) $(COPY_FILES)
iverilog -g2005-sv $(FLAGS) -s $@ -o $@ $(SUPER6502_FPGA_SOURCES) $(SIM_SOURCES) -I ../../
iverilog -g2005-sv $(FLAGS) -s $@ -o $@ $(INCLUDE) $(SUPER6502_FPGA_SOURCES) $(SIM_SOURCES) -I ../../
$(COPY_FILES): ../../$@
cp ../../$@ .