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Add sdram, don't think it works though

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This commit is contained in:
Byron Lathi
2024-03-03 20:43:37 -08:00
parent 78dfb01bd7
commit 10a72d8e1f
17 changed files with 6256 additions and 31 deletions
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56
hw/super6502_fpga/src/sim/hvl/sim_top.sv
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@@ -2,6 +2,8 @@
module sim_top();
`include "include/sdram_controller_define.vh"
localparam ADDR_WIDTH = 32;
localparam DATA_WIDTH = 32;
@@ -71,11 +73,48 @@ cpu_65c02 u_cpu0 (
.SYNC (w_cpu0_sync)
);
logic w_sdr_CKE;
logic w_sdr_n_CS;
logic w_sdr_n_WE;
logic w_sdr_n_RAS;
logic w_sdr_n_CAS;
logic [BA_WIDTH -1:0] w_sdr_BA;
logic [ROW_WIDTH -1:0] w_sdr_ADDR;
logic [DQ_GROUP *DQ_WIDTH -1:0] w_sdr_DATA;
logic [DQ_GROUP *DQ_WIDTH -1:0] w_sdr_DATA_oe;
logic [DQ_GROUP -1:0] w_sdr_DQM;
wire [DQ_GROUP *DQ_WIDTH -1:0] w_sdr_DQ;
// ^ Has to be wire because of tristate/inout stuff
genvar i, j;
generate
for (i=0; i<DQ_GROUP*DQ_WIDTH; i=i+1)
begin: DQ_map
assign w_sdr_DQ[i] = (w_sdr_DATA_oe[i]) ? w_sdr_DATA[i] : 1'bz;
end
for (j=0; j<DQ_GROUP; j=j+1)
begin : mem_inst
generic_sdr inst_sdr
(
.Dq(w_sdr_DQ[((j+1)*(DQ_WIDTH))-1:((j)*DQ_WIDTH)]),
.Addr(w_sdr_ADDR[ROW_WIDTH-1:0]),
.Ba(w_sdr_BA[BA_WIDTH-1:0]),
.Clk(~clk_200),
.Cke(w_sdr_CKE),
.Cs_n(w_sdr_n_CS),
.Ras_n(w_sdr_n_RAS),
.Cas_n(w_sdr_n_CAS),
.We_n(w_sdr_n_WE),
.Dqm(w_sdr_DQM[j])
);
end
endgenerate
super6502_fpga u_dut (
.i_sysclk (clk_100),
.i_sdrclk (clk_200),
.i_tACclk (clk_200),
.i_tACclk (~clk_200),
.clk_cpu (clk_cpu),
.button_reset (button_reset),
@@ -87,7 +126,20 @@ super6502_fpga u_dut (
.o_cpu0_rdy (w_cpu0_rdy),
.o_cpu0_irqb (w_cpu0_irqb),
.i_cpu0_rwb (~w_cpu0_we),
.i_cpu0_sync (w_cpu0_sync)
.i_cpu0_sync (w_cpu0_sync),
.o_sdr_CKE (w_sdr_CKE),
.o_sdr_n_CS (w_sdr_n_CS),
.o_sdr_n_WE (w_sdr_n_WE),
.o_sdr_n_RAS (w_sdr_n_RAS),
.o_sdr_n_CAS (w_sdr_n_CAS),
.o_sdr_BA (w_sdr_BA),
.o_sdr_ADDR (w_sdr_ADDR),
.i_sdr_DATA (w_sdr_DQ),
.o_sdr_DATA (w_sdr_DATA),
.o_sdr_DATA_oe (w_sdr_DATA_oe),
.o_sdr_DQM (w_sdr_DQM)
);
initial begin