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Change "state" to "tx_state" etc.

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This commit is contained in:
Byron Lathi
2022-03-14 15:10:59 -05:00
parent b2344d986e
commit 264263b0d9
1 changed files with 20 additions and 20 deletions
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40
hw/fpga/uart.sv
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@@ -58,12 +58,12 @@ always_ff @(posedge clk) begin
tx_flag_set <= '0; tx_flag_set <= '0;
end end
// state controller // tx state controller
typedef enum bit [2:0] {START, DATA, PARITY, STOP, IDLE} macro_t; typedef enum bit [2:0] {START, DATA, PARITY, STOP, IDLE} macro_t;
struct packed { struct packed {
macro_t macro; macro_t macro;
logic [3:0] count; logic [3:0] count;
} state, next_state; } tx_state, tx_next_state, rx_state, rx_next_state;
localparam logic [3:0] maxcount = 4'h7; localparam logic [3:0] maxcount = 4'h7;
// baud rate: 9600 // baud rate: 9600
@@ -74,8 +74,8 @@ logic [14:0] clkdiv;
always_ff @(posedge clk_50) begin always_ff @(posedge clk_50) begin
if (rst) begin if (rst) begin
clkdiv <= 0; clkdiv <= 0;
state.macro <= IDLE; tx_state.macro <= IDLE;
state.count <= 3'b0; tx_state.count <= 3'b0;
tx_flag <= '0; tx_flag <= '0;
end else begin end else begin
if (tx_flag_set) if (tx_flag_set)
@@ -85,7 +85,7 @@ always_ff @(posedge clk_50) begin
if (clkdiv == count) begin if (clkdiv == count) begin
clkdiv <= 0; clkdiv <= 0;
state <= next_state; tx_state <= tx_next_state;
end else begin end else begin
clkdiv <= clkdiv + 15'b1; clkdiv <= clkdiv + 15'b1;
end end
@@ -93,33 +93,33 @@ always_ff @(posedge clk_50) begin
end end
always_comb begin always_comb begin
next_state = state; tx_next_state = tx_state;
unique case (state.macro) unique case (tx_state.macro)
START: begin START: begin
next_state.macro = DATA; tx_next_state.macro = DATA;
next_state.count = 3'b0; tx_next_state.count = 3'b0;
end end
DATA: begin DATA: begin
if (state.count == maxcount) begin if (tx_state.count == maxcount) begin
next_state.macro = STOP; // or PARITY tx_next_state.macro = STOP; // or PARITY
next_state.count = 3'b0; tx_next_state.count = 3'b0;
end else begin end else begin
next_state.count = state.count + 3'b1; tx_next_state.count = tx_state.count + 3'b1;
next_state.macro = DATA; tx_next_state.macro = DATA;
end end
end end
PARITY: begin PARITY: begin
end end
STOP: begin STOP: begin
next_state.macro = IDLE; tx_next_state.macro = IDLE;
next_state.count = '0; tx_next_state.count = '0;
end end
IDLE: begin IDLE: begin
if (tx_flag) if (tx_flag)
next_state.macro = START; tx_next_state.macro = START;
else else
next_state.macro = IDLE; tx_next_state.macro = IDLE;
end end
default:; default:;
@@ -130,12 +130,12 @@ always_comb begin
TXD = '1; TXD = '1;
tx_flag_clear = '0; tx_flag_clear = '0;
unique case (state.macro) unique case (tx_state.macro)
START: begin START: begin
TXD = '0; TXD = '0;
end end
DATA: begin DATA: begin
TXD = tx_buf[state.count]; TXD = tx_buf[tx_state.count];
end end
PARITY: begin PARITY: begin