Add quick uart irq test
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42
sw/test_code/uart_irq_test/Makefile
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42
sw/test_code/uart_irq_test/Makefile
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CC=../../cc65/bin/cl65
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LD=../../cc65/bin/cl65
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CFLAGS=-T -t none -I. --cpu "65C02"
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LDFLAGS=-C link.ld -m $(NAME).map
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NAME=uart_irq_test
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DEVICES=$(REPO_TOP)/sw/kernel/devices
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BIN=$(NAME).bin
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HEX=$(NAME).hex
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LISTS=lists
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SRCS=$(wildcard *.s) $(wildcard *.c)
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SRCS+=$(DEVICES)/interrupt_controller.s
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SRCS+=$(wildcard **/*.s) $(wildcard **/*.c)
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OBJS+=$(patsubst %.s,%.o,$(filter %s,$(SRCS)))
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OBJS+=$(patsubst %.c,%.o,$(filter %c,$(SRCS)))
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# Make sure the kernel linked to correct address, no relocation!
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all: $(HEX)
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$(HEX): $(BIN)
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objcopy --input-target=binary --output-target=verilog $(BIN) $(HEX)
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$(BIN): $(OBJS)
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$(CC) $(CFLAGS) $(LDFLAGS) $(OBJS) -o $@
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%.o: %.c $(LISTS)
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$(CC) $(CFLAGS) -l $(LISTS)/$<.list -c $< -o $@
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%.o: %.s $(LISTS)
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$(CC) $(CFLAGS) -l $(LISTS)/$<.list -c $< -o $@
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$(LISTS):
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mkdir -p $(addprefix $(LISTS)/,$(sort $(dir $(SRCS))))
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.PHONY: clean
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clean:
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rm -rf $(OBJS) $(BIN) $(HEX) $(LISTS) $(NAME).map
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35
sw/test_code/uart_irq_test/link.ld
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35
sw/test_code/uart_irq_test/link.ld
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MEMORY
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{
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ZP: start = $0, size = $100, type = rw, define = yes;
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SDRAM: start = $9200, size = $4d00, type = rw, define = yes;
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ROM: start = $F000, size = $1000, file = %O;
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}
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SEGMENTS {
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ZEROPAGE: load = ZP, type = zp, define = yes;
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DATA: load = ROM, type = rw, define = yes, run = SDRAM;
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BSS: load = SDRAM, type = bss, define = yes;
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HEAP: load = SDRAM, type = bss, optional = yes;
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STARTUP: load = ROM, type = ro;
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ONCE: load = ROM, type = ro, optional = yes;
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CODE: load = ROM, type = ro;
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RODATA: load = ROM, type = ro;
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VECTORS: load = ROM, type = ro, start = $FFFA;
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}
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FEATURES {
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CONDES: segment = STARTUP,
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type = constructor,
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label = __CONSTRUCTOR_TABLE__,
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count = __CONSTRUCTOR_COUNT__;
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CONDES: segment = STARTUP,
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type = destructor,
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label = __DESTRUCTOR_TABLE__,
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count = __DESTRUCTOR_COUNT__;
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}
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SYMBOLS {
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# Define the stack size for the application
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__STACKSIZE__: value = $0200, type = weak;
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__STACKSTART__: type = weak, value = $0800; # 2k stack
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}
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35
sw/test_code/uart_irq_test/main.s
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35
sw/test_code/uart_irq_test/main.s
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.export _init, nmi_int, irq_int
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.autoimport
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.import _init_interrupt_controller
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.zeropage
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finish: .res 1
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.code
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nmi_int:
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irq_int:
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lda #$6d
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sta $00
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_init:
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ldx #$ff
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txs
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LDA #<(__STACKSTART__ + __STACKSIZE__)
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STA sp
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LDA #>(__STACKSTART__ + __STACKSIZE__)
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STA sp+1
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; enable interrupt 0
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lda #$00
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jsr pusha
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lda #$1
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jsr _enable_irq
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cli
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@end: bra @end
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14
sw/test_code/uart_irq_test/vectors.s
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14
sw/test_code/uart_irq_test/vectors.s
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; ---------------------------------------------------------------------------
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; vectors.s
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; ---------------------------------------------------------------------------
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;
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; Defines the interrupt vector table.
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.import _init
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.import nmi_int, irq_int
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.segment "VECTORS"
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.addr nmi_int ; NMI vector
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.addr _init ; Reset vector
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.addr irq_int ; IRQ/BRK vector
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