Get the FPGA part working
This changes some of the clocks, fixes a bug in the seven segment stuff.
This commit is contained in:
@@ -16,7 +16,7 @@ logic [7:0] _data [2];
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always_ff @(posedge clk) begin
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if (rst)
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_data = '{default:'0};
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if (~rw)
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if (~rw & cs)
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_data[addr] <= data;
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end
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@@ -1,58 +1,16 @@
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BANDWIDTH_TYPE=AUTO
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CLK0_DIVIDE_BY=50
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CLK0_DUTY_CYCLE=50
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CLK0_MULTIPLY_BY=1
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CLK0_PHASE_SHIFT=0
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COMPENSATE_CLOCK=CLK0
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INCLK0_INPUT_FREQUENCY=20000
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ADDRESS_ACLR_A=NONE
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CLOCK_ENABLE_INPUT_A=BYPASS
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CLOCK_ENABLE_OUTPUT_A=BYPASS
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INIT_FILE=../../sw/bootrom.hex
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INTENDED_DEVICE_FAMILY="MAX 10"
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LPM_TYPE=altpll
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OPERATION_MODE=NORMAL
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PLL_TYPE=AUTO
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PORT_ACTIVECLOCK=PORT_UNUSED
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PORT_ARESET=PORT_UNUSED
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PORT_CLKBAD0=PORT_UNUSED
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PORT_CLKBAD1=PORT_UNUSED
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PORT_CLKLOSS=PORT_UNUSED
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PORT_CLKSWITCH=PORT_UNUSED
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PORT_CONFIGUPDATE=PORT_UNUSED
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PORT_FBIN=PORT_UNUSED
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PORT_INCLK0=PORT_USED
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PORT_INCLK1=PORT_UNUSED
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PORT_LOCKED=PORT_UNUSED
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PORT_PFDENA=PORT_UNUSED
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PORT_PHASECOUNTERSELECT=PORT_UNUSED
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PORT_PHASEDONE=PORT_UNUSED
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PORT_PHASESTEP=PORT_UNUSED
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PORT_PHASEUPDOWN=PORT_UNUSED
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PORT_PLLENA=PORT_UNUSED
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PORT_SCANACLR=PORT_UNUSED
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PORT_SCANCLK=PORT_UNUSED
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PORT_SCANCLKENA=PORT_UNUSED
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PORT_SCANDATA=PORT_UNUSED
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PORT_SCANDATAOUT=PORT_UNUSED
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PORT_SCANDONE=PORT_UNUSED
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PORT_SCANREAD=PORT_UNUSED
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PORT_SCANWRITE=PORT_UNUSED
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PORT_clk0=PORT_USED
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PORT_clk1=PORT_UNUSED
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PORT_clk2=PORT_UNUSED
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PORT_clk3=PORT_UNUSED
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PORT_clk4=PORT_UNUSED
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PORT_clk5=PORT_UNUSED
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PORT_clkena0=PORT_UNUSED
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PORT_clkena1=PORT_UNUSED
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PORT_clkena2=PORT_UNUSED
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PORT_clkena3=PORT_UNUSED
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PORT_clkena4=PORT_UNUSED
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PORT_clkena5=PORT_UNUSED
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PORT_extclk0=PORT_UNUSED
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PORT_extclk1=PORT_UNUSED
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PORT_extclk2=PORT_UNUSED
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PORT_extclk3=PORT_UNUSED
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WIDTH_CLOCK=5
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NUMWORDS_A=32768
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OPERATION_MODE=ROM
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OUTDATA_ACLR_A=NONE
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OUTDATA_REG_A=UNREGISTERED
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WIDTHAD_A=15
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WIDTH_A=8
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WIDTH_BYTEENA_A=1
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DEVICE_FAMILY="MAX 10"
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CBX_AUTO_BLACKBOX=ALL
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inclk
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inclk
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clk
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address_a
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clock0
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q_a
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11017
hw/fpga/output_files/firsttry.vcd
Normal file
11017
hw/fpga/output_files/firsttry.vcd
Normal file
File diff suppressed because it is too large
Load Diff
469
hw/fpga/output_files/stp1.stp
Normal file
469
hw/fpga/output_files/stp1.stp
Normal file
File diff suppressed because one or more lines are too long
13
hw/fpga/output_files/super6502.cdf
Normal file
13
hw/fpga/output_files/super6502.cdf
Normal file
@@ -0,0 +1,13 @@
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/* Quartus Prime Version 18.1.0 Build 625 09/12/2018 SJ Lite Edition */
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JedecChain;
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FileRevision(JESD32A);
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DefaultMfr(6E);
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P ActionCode(Cfg)
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Device PartName(10M50DAF484) Path("/home/byron/Projects/super6502/hw/fpga/output_files/") File("super6502.sof") MfrSpec(OpMask(1));
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ChainEnd;
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AlteraBegin;
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ChainType(JTAG);
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AlteraEnd;
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@@ -84,9 +84,9 @@ module rom (
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altsyncram_component.clock_enable_input_a = "BYPASS",
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altsyncram_component.clock_enable_output_a = "BYPASS",
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`ifdef NO_PLI
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altsyncram_component.init_file = "boot.rif"
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altsyncram_component.init_file = "../../sw/bootrom.rif"
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`else
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altsyncram_component.init_file = "boot.hex"
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altsyncram_component.init_file = "../../sw/bootrom.hex"
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`endif
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,
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altsyncram_component.intended_device_family = "MAX 10",
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@@ -123,7 +123,7 @@ endmodule
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// Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC "1"
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// Retrieval info: PRIVATE: JTAG_ID STRING "ROM0"
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// Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC "0"
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// Retrieval info: PRIVATE: MIFfilename STRING "boot.hex"
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// Retrieval info: PRIVATE: MIFfilename STRING "../../sw/bootrom.hex"
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// Retrieval info: PRIVATE: NUMWORDS_A NUMERIC "32768"
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// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0"
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// Retrieval info: PRIVATE: RegAddr NUMERIC "1"
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@@ -138,7 +138,7 @@ endmodule
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// Retrieval info: CONSTANT: ADDRESS_ACLR_A STRING "NONE"
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// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING "BYPASS"
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// Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_A STRING "BYPASS"
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// Retrieval info: CONSTANT: INIT_FILE STRING "boot.hex"
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// Retrieval info: CONSTANT: INIT_FILE STRING "../../sw/bootrom.hex"
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// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "MAX 10"
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// Retrieval info: CONSTANT: LPM_HINT STRING "ENABLE_RUNTIME_MOD=YES,INSTANCE_NAME=ROM0"
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// Retrieval info: CONSTANT: LPM_TYPE STRING "altsyncram"
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File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -88,8 +88,56 @@ set_location_assignment PIN_AA15 -to cpu_sync
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set_location_assignment PIN_V5 -to cpu_nmib
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set_location_assignment PIN_W7 -to cpu_mlb
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set_location_assignment PIN_W8 -to cpu_irqb
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set_location_assignment PIN_P11 -to clk
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set_location_assignment PIN_B8 -to rst
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set_location_assignment PIN_C17 -to HEX0[6]
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set_location_assignment PIN_D17 -to HEX0[5]
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set_location_assignment PIN_E16 -to HEX0[4]
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set_location_assignment PIN_C10 -to SW[0]
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set_location_assignment PIN_C11 -to SW[1]
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set_location_assignment PIN_D12 -to SW[2]
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set_location_assignment PIN_C12 -to SW[3]
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set_location_assignment PIN_A12 -to SW[4]
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set_location_assignment PIN_B12 -to SW[5]
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set_location_assignment PIN_A13 -to SW[6]
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set_location_assignment PIN_A14 -to SW[7]
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set_location_assignment PIN_B14 -to SW[8]
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set_location_assignment PIN_F15 -to SW[9]
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set_location_assignment PIN_A7 -to Run
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set_location_assignment PIN_A8 -to LED[0]
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set_location_assignment PIN_A9 -to LED[1]
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set_location_assignment PIN_A10 -to LED[2]
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set_location_assignment PIN_B10 -to LED[3]
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set_location_assignment PIN_D13 -to LED[4]
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set_location_assignment PIN_C13 -to LED[5]
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set_location_assignment PIN_E14 -to LED[6]
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set_location_assignment PIN_D14 -to LED[7]
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set_location_assignment PIN_A11 -to LED[8]
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set_location_assignment PIN_B11 -to LED[9]
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set_location_assignment PIN_F21 -to HEX3[0]
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set_location_assignment PIN_E22 -to HEX3[1]
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set_location_assignment PIN_E21 -to HEX3[2]
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set_location_assignment PIN_C19 -to HEX3[3]
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set_location_assignment PIN_C20 -to HEX3[4]
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set_location_assignment PIN_D19 -to HEX3[5]
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set_location_assignment PIN_E17 -to HEX3[6]
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set_location_assignment PIN_B20 -to HEX2[0]
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set_location_assignment PIN_A20 -to HEX2[1]
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set_location_assignment PIN_B19 -to HEX2[2]
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set_location_assignment PIN_A21 -to HEX2[3]
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set_location_assignment PIN_B21 -to HEX2[4]
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set_location_assignment PIN_C22 -to HEX2[5]
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set_location_assignment PIN_B22 -to HEX2[6]
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set_location_assignment PIN_C18 -to HEX1[0]
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set_location_assignment PIN_D18 -to HEX1[1]
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set_location_assignment PIN_E18 -to HEX1[2]
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set_location_assignment PIN_B16 -to HEX1[3]
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set_location_assignment PIN_A17 -to HEX1[4]
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set_location_assignment PIN_A18 -to HEX1[5]
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set_location_assignment PIN_B17 -to HEX1[6]
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set_location_assignment PIN_C14 -to HEX0[0]
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set_location_assignment PIN_E15 -to HEX0[1]
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set_location_assignment PIN_C15 -to HEX0[2]
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set_location_assignment PIN_C16 -to HEX0[3]
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set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
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set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
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set_global_assignment -name SYSTEMVERILOG_FILE addr_decode.sv
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@@ -101,4 +149,232 @@ set_global_assignment -name QIP_FILE rom.qip
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set_global_assignment -name SYSTEMVERILOG_FILE HexDriver.sv
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set_global_assignment -name SYSTEMVERILOG_FILE SevenSeg.sv
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set_global_assignment -name QIP_FILE cpu_clk.qip
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set_location_assignment PIN_B8 -to rst_n
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set_location_assignment PIN_P11 -to clk_50
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set_global_assignment -name ENABLE_OCT_DONE OFF
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set_global_assignment -name EXTERNAL_FLASH_FALLBACK_ADDRESS 00000000
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set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
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set_global_assignment -name INTERNAL_FLASH_UPDATE_MODE "SINGLE IMAGE WITH ERAM"
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set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
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set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
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set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
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set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
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set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_vpb
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[15]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[14]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[13]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[12]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[11]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[10]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[9]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[8]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[7]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[6]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[5]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[4]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[3]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[2]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[1]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[0]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_be
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_data[7]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_data[6]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_data[5]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_data[4]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_data[3]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_data[2]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_data[1]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_data[0]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_irqb
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_led
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_mlb
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_nmib
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_phi2
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_rdy
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_resb
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_rwb
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_sob
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_sync
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set_instance_assignment -name IO_STANDARD "2.5 V" -to clk_50
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set_global_assignment -name ENABLE_SIGNALTAP ON
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set_global_assignment -name USE_SIGNALTAP_FILE output_files/stp1.stp
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set_global_assignment -name SIGNALTAP_FILE output_files/stp1.stp
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set_global_assignment -name SLD_NODE_CREATOR_ID 110 -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_ENTITY_NAME sld_signaltap -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_RAM_BLOCK_TYPE=AUTO" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_INFO=805334528" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_POWER_UP_TRIGGER=0" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STORAGE_QUALIFIER_INVERSION_MASK_LENGTH=0" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_SEGMENT_SIZE=1024" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ATTRIBUTE_MEM_MODE=OFF" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STATE_FLOW_USE_GENERATED=0" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STATE_BITS=11" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_BUFFER_FULL_STOP=1" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_CURRENT_RESOURCE_WIDTH=1" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INCREMENTAL_ROUTING=1" -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[1] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[3] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[5] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[12] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[15] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[19] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[25] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[31] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL=1" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_SAMPLE_DEPTH=1024" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_IN_ENABLED=0" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_PIPELINE=0" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_RAM_PIPELINE=0" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_COUNTER_PIPELINE=0" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ADVANCED_TRIGGER_ENTITY=basic,1," -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL_PIPELINE=1" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ENABLE_ADVANCED_TRIGGER=0" -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[11] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[23] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[26] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[30] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[10] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
|
||||
set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT acq_clk -to "cpu_clk:cpu_clk|altpll:altpll_component|cpu_clk_altpll:auto_generated|wire_pll1_clk[0]~clkctrl" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[6] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
|
||||
set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[8] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
|
||||
set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[13] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
|
||||
set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[14] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[0] -to "SevenSeg:segs|_data[0][0]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[1] -to "SevenSeg:segs|_data[0][1]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[2] -to "SevenSeg:segs|_data[0][2]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[3] -to "SevenSeg:segs|_data[0][3]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[4] -to "SevenSeg:segs|_data[0][4]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[5] -to "SevenSeg:segs|_data[0][5]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[6] -to "SevenSeg:segs|_data[0][6]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[7] -to "SevenSeg:segs|_data[0][7]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[8] -to "SevenSeg:segs|_data[1][0]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[9] -to "SevenSeg:segs|_data[1][1]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[10] -to "SevenSeg:segs|_data[1][2]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[11] -to "SevenSeg:segs|_data[1][3]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[12] -to "SevenSeg:segs|_data[1][4]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[13] -to "SevenSeg:segs|_data[1][5]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[14] -to "SevenSeg:segs|_data[1][6]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[15] -to "SevenSeg:segs|_data[1][7]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[16] -to "SevenSeg:segs|addr" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[17] -to "SevenSeg:segs|clk" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[18] -to "SevenSeg:segs|cs" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[19] -to "SevenSeg:segs|rst" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[20] -to "SevenSeg:segs|rw" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[21] -to cpu_addr[0] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[22] -to cpu_addr[10] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[23] -to cpu_addr[11] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[24] -to cpu_addr[12] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[25] -to cpu_addr[13] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[26] -to cpu_addr[14] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[27] -to cpu_addr[15] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[28] -to cpu_addr[1] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[29] -to cpu_addr[2] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[30] -to cpu_addr[3] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[31] -to cpu_addr[4] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[32] -to cpu_addr[5] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[33] -to cpu_addr[6] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[34] -to cpu_addr[7] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[35] -to cpu_addr[8] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[36] -to cpu_addr[9] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[37] -to cpu_data_in[0] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[38] -to cpu_data_in[1] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[39] -to cpu_data_in[2] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[40] -to cpu_data_in[3] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[41] -to cpu_data_in[4] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[42] -to cpu_data_in[5] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[43] -to cpu_data_in[6] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[44] -to cpu_data_in[7] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[45] -to cpu_data_out[0] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[46] -to cpu_data_out[1] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[47] -to cpu_data_out[2] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[48] -to cpu_data_out[3] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[49] -to cpu_data_out[4] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[50] -to cpu_data_out[5] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[51] -to cpu_data_out[6] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[52] -to cpu_data_out[7] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[53] -to cpu_phi2 -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[54] -to cpu_rwb -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[55] -to cpu_sync -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[56] -to cpu_vpb -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[57] -to rst_n -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[0] -to "SevenSeg:segs|_data[0][0]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[1] -to "SevenSeg:segs|_data[0][1]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[2] -to "SevenSeg:segs|_data[0][2]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[3] -to "SevenSeg:segs|_data[0][3]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[4] -to "SevenSeg:segs|_data[0][4]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[5] -to "SevenSeg:segs|_data[0][5]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[6] -to "SevenSeg:segs|_data[0][6]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[7] -to "SevenSeg:segs|_data[0][7]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[8] -to "SevenSeg:segs|_data[1][0]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[9] -to "SevenSeg:segs|_data[1][1]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[10] -to "SevenSeg:segs|_data[1][2]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[11] -to "SevenSeg:segs|_data[1][3]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[12] -to "SevenSeg:segs|_data[1][4]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[13] -to "SevenSeg:segs|_data[1][5]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[14] -to "SevenSeg:segs|_data[1][6]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[15] -to "SevenSeg:segs|_data[1][7]" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[16] -to "SevenSeg:segs|addr" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[17] -to "SevenSeg:segs|clk" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[18] -to "SevenSeg:segs|cs" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[19] -to "SevenSeg:segs|rst" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[20] -to "SevenSeg:segs|rw" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[21] -to cpu_addr[0] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[22] -to cpu_addr[10] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[23] -to cpu_addr[11] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[24] -to cpu_addr[12] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[25] -to cpu_addr[13] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[26] -to cpu_addr[14] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[27] -to cpu_addr[15] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[28] -to cpu_addr[1] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[29] -to cpu_addr[2] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[30] -to cpu_addr[3] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[31] -to cpu_addr[4] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[32] -to cpu_addr[5] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[33] -to cpu_addr[6] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[34] -to cpu_addr[7] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[35] -to cpu_addr[8] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[36] -to cpu_addr[9] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[37] -to cpu_data_in[0] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[38] -to cpu_data_in[1] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[39] -to cpu_data_in[2] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[40] -to cpu_data_in[3] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[41] -to cpu_data_in[4] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[42] -to cpu_data_in[5] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[43] -to cpu_data_in[6] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[44] -to cpu_data_in[7] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[45] -to cpu_data_out[0] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[46] -to cpu_data_out[1] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[47] -to cpu_data_out[2] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[48] -to cpu_data_out[3] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[49] -to cpu_data_out[4] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[50] -to cpu_data_out[5] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[51] -to cpu_data_out[6] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[52] -to cpu_data_out[7] -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[53] -to cpu_phi2 -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[54] -to cpu_rwb -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[55] -to cpu_sync -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[56] -to cpu_vpb -section_id auto_signaltap_0
|
||||
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[57] -to rst_n -section_id auto_signaltap_0
|
||||
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_DATA_BITS=58" -section_id auto_signaltap_0
|
||||
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_BITS=58" -section_id auto_signaltap_0
|
||||
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STORAGE_QUALIFIER_BITS=58" -section_id auto_signaltap_0
|
||||
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK=000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" -section_id auto_signaltap_0
|
||||
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK_LENGTH=198" -section_id auto_signaltap_0
|
||||
set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[0] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
|
||||
set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[2] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
|
||||
set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[4] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
|
||||
set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[7] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
|
||||
set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[9] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
|
||||
set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[16] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
|
||||
set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[17] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
|
||||
set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[18] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
|
||||
set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[20] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
|
||||
set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[21] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
|
||||
set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[22] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
|
||||
set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[24] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
|
||||
set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[27] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
|
||||
set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[28] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
|
||||
set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[29] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
|
||||
set_global_assignment -name SLD_FILE db/stp1_auto_stripped.stp
|
||||
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
|
||||
@@ -1,7 +1,7 @@
|
||||
#**************************************************************
|
||||
# Create Clock (where ‘clk’ is the user-defined system clock name)
|
||||
#**************************************************************
|
||||
create_clock -name {clk} -period 20ns -waveform {0.000 5.000} [get_ports {clk}]
|
||||
create_clock -name {clk_50} -period 20ns -waveform {0.000 5.000} [get_ports {clk}]
|
||||
# Constrain the input I/O path
|
||||
set_input_delay -clock {clk} -max 3 [all_inputs]
|
||||
set_input_delay -clock {clk} -min 2 [all_inputs]
|
||||
|
||||
@@ -47,6 +47,17 @@ cpu_clk cpu_clk(
|
||||
.c0(clk)
|
||||
);
|
||||
|
||||
always @(posedge clk) begin
|
||||
cpu_phi2 <= ~cpu_phi2;
|
||||
end
|
||||
|
||||
assign cpu_rdy = '1;
|
||||
assign cpu_sob = '0;
|
||||
assign cpu_resb = rst_n;
|
||||
assign cpu_be = '1;
|
||||
assign cpu_nmib = '1;
|
||||
assign cpu_irqb = '1;
|
||||
|
||||
addr_decode decode(
|
||||
.addr(cpu_addr),
|
||||
.ram_cs(ram_cs),
|
||||
@@ -54,17 +65,6 @@ addr_decode decode(
|
||||
.hex_cs(hex_cs)
|
||||
);
|
||||
|
||||
|
||||
logic [2:0] clk_count;
|
||||
always_ff @(posedge clk) begin
|
||||
clk_count <= clk_count + 3'b1;
|
||||
if (clk_count == 3'h4) begin
|
||||
clk_count <= '0;
|
||||
cpu_phi2 <= ~cpu_phi2;
|
||||
end
|
||||
end
|
||||
|
||||
|
||||
|
||||
always_comb begin
|
||||
if (ram_cs)
|
||||
|
||||
Reference in New Issue
Block a user