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Update sdram controller with new Efinity version

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For some reason the old one did not want to open in the new version.
Even though the version of the IP is the same, something about it being
made with the old Efinity version made it mad.

I just deleted it and made it again with the same settings and now it
lets me open and configure it.
This commit is contained in:
Byron Lathi
2023-01-06 10:28:08 -05:00
parent 8181a3a583
commit 4f8e63f463
3 changed files with 56 additions and 56 deletions
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50
hw/efinix_fpga/ip/sdram_controller/sdram_controller.v
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@@ -1,6 +1,6 @@
// =============================================================================
// Generated by efx_ipmgr
// Version: 2022.1.226
// Version: 2022.2.322
// IP Version: 1.6
// =============================================================================
@@ -43,7 +43,7 @@
//
////////////////////////////////////////////////////////////////////////////////
`define IP_UUID _1a076fc510c34dc9a60c0ede33930d9f
`define IP_UUID _08775b1d2de94ebcb82f5350820af2e3
`define IP_NAME_CONCAT(a,b) a``b
`define IP_MODULE_NAME(name) `IP_NAME_CONCAT(name,`IP_UUID)
module sdram_controller (
@@ -93,40 +93,40 @@ output o_dbg_tRCD_done
);
`IP_MODULE_NAME(efx_sdram_controller) #(
.fSYS_MHz (100),
.fCK_MHz (200),
.fCK_MHz (200),
.tIORT_u (2),
.CL (3),
.BL (1),
.DDIO_TYPE ("SOFT"),
.DQ_WIDTH (8),
.DQ_WIDTH (8),
.DQ_GROUP (2),
.BA_WIDTH (2),
.ROW_WIDTH (13),
.COL_WIDTH (9),
.tPWRUP (200000),
.tRAS (44),
.tRC (66),
.BA_WIDTH (2),
.ROW_WIDTH (13),
.COL_WIDTH (9),
.tPWRUP (200000),
.tRAS (44),
.tRAS_MAX (120000),
.tRC (66),
.tRCD (20),
.tREF (64000000),
.tREF (64000000),
.tRFC (66),
.tRP (20),
.tWR (2),
.tMRD (2),
.tRFC (66),
.tRAS_MAX (120000),
.DATA_RATE (2),
.AXI_ARADDR_WIDTH (24),
.SDRAM_MODE ("Native"),
.AXI_BUSER_WIDTH (2),
.AXI_BID_WIDTH (4),
.AXI_AWUSER_WIDTH (2),
.AXI_AWID_WIDTH (4),
.DATA_RATE (2),
.AXI_AWADDR_WIDTH (24),
.AXI_RDATA_WIDTH (32),
.AXI_WUSER_WIDTH (2),
.AXI_WDATA_WIDTH (32),
.AXI_RUSER_WIDTH (3),
.AXI_ARUSER_WIDTH (3),
.AXI_ARADDR_WIDTH (24),
.AXI_RDATA_WIDTH (32),
.AXI_AWID_WIDTH (4),
.AXI_AWUSER_WIDTH (2),
.AXI_WUSER_WIDTH (2),
.AXI_BID_WIDTH (4),
.AXI_BUSER_WIDTH (2),
.AXI_ARID_WIDTH (4),
.tRP (20),
.CL (3)
.AXI_ARUSER_WIDTH (3),
.AXI_RUSER_WIDTH (3)
) u_efx_sdram_controller(
.i_we ( i_we ),
.i_sysclk ( i_sysclk ),