Remove fpga RAM
This removes the ram from inside the FPGA. All RAM is now located in the external SDRAM instead. The ROM is still in the FPGA to allow easier programming.
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@@ -1,6 +1,5 @@
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module addr_decode(
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input logic [15:0] addr,
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output logic ram_cs,
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output logic sdram_cs,
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output logic rom_cs,
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output logic hex_cs,
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@@ -10,8 +9,7 @@ module addr_decode(
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);
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assign rom_cs = addr >= 16'h8000;
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assign ram_cs = addr < 16'h4000;
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assign sdram_cs = addr >= 16'h4000 && addr < 16'h7ff0;
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assign sdram_cs = addr < 16'h7ff0;
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assign hex_cs = addr >= 16'h7ff0 && addr < 16'h7ff4;
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assign uart_cs = addr >= 16'h7ff4 && addr < 16'h7ff6;
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assign board_io_cs = addr == 16'h7ff6;
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