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Add timer and test program

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This commit is contained in:
Byron Lathi
2022-12-29 11:51:38 -05:00
parent 642dfcbeb1
commit 8c4102612f
9 changed files with 98 additions and 2306 deletions
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17
hw/efinix_fpga/super6502.sv
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@@ -66,23 +66,28 @@ end
logic w_rom_cs;
logic w_leds_cs;
logic w_sdram_cs;
logic w_timer_cs;
addr_decode u_addr_decode(
.i_addr(cpu_addr),
.o_rom_cs(w_rom_cs),
.o_leds_cs(w_leds_cs),
.o_timer_cs(w_timer_cs),
.o_sdram_cs(w_sdram_cs)
);
logic [7:0] w_rom_data_out;
logic [7:0] w_leds_data_out;
logic [7:0] w_timer_data_out;
logic [7:0] w_sdram_data_out;
always_comb begin
if (w_rom_cs)
cpu_data_out = w_rom_data_out;
else if (w_leds_cs)
cpu_data_out = w_leds_data_out;
cpu_data_out = w_leds_data_out;
else if (w_timer_cs)
cpu_data_out = w_timer_data_out;
else if (w_sdram_cs)
cpu_data_out = w_sdram_data_out;
else
@@ -110,6 +115,16 @@ leds u_leds(
.o_leds(leds)
);
timer u_timer(
.clk(clk_2),
.reset(~cpu_resb),
.i_data(cpu_data_in),
.o_data(w_timer_data_out),
.cs(w_timer_cs),
.rwb(cpu_rwb),
.addr(cpu_addr[2:0])
);
sdram_adapter u_sdram_adapter(
.i_cpuclk(clk_2),
.i_arst(~button_reset),