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Add bb_spi_controller

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Bit banged spi controller, very simple but very slow.
This commit is contained in:
Byron Lathi
2022-03-08 15:26:01 -06:00
parent e1f50e825d
commit ad55f986f5
5 changed files with 153 additions and 2 deletions
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7
hw/fpga/super6502.qsf
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@@ -49,7 +49,6 @@ set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 256
set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (SystemVerilog)"
set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation
set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "SYSTEMVERILOG HDL" -section_id eda_simulation
set_global_assignment -name SYSTEMVERILOG_FILE super6502.sv
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
@@ -91,7 +90,11 @@ set_location_assignment PIN_W7 -to cpu_mlb
set_location_assignment PIN_W8 -to cpu_irqb
set_location_assignment PIN_P11 -to clk
set_location_assignment PIN_B8 -to rst
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
set_global_assignment -name SYSTEMVERILOG_FILE bb_spi_controller.sv
set_global_assignment -name SYSTEMVERILOG_FILE super6502.sv
set_global_assignment -name QIP_FILE ram.qip
set_global_assignment -name SDC_FILE super6502.sdc
set_global_assignment -name QIP_FILE rom.qip
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"