Fix some warnings
Adds some missing cases, length specifiers.
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@@ -84,12 +84,12 @@ always_ff @(posedge clk) begin
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if (addr < 4'h4) begin
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arg[8 * addr +: 8] <= data;
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end else if (addr == 4'h4) begin
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cmd <= data;
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cmd <= data[6:0];
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end
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end
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if (cs & addr == 4'h5 && sd_clk) begin
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data_count <= data_count + 1;
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data_count <= data_count + 9'b1;
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end
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if (state.macro == RXCMD) begin
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@@ -183,7 +183,7 @@ always_comb begin
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if (state.d_bit_count == 8'h0) begin
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next_state.count = state.count + 9'b1;
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end
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next_state.d_bit_count = state.d_bit_count - 8'h1;
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next_state.d_bit_count = state.d_bit_count - 3'h1;
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end else begin
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next_data_flag = '1;
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next_state.macro = RXDCRC;
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@@ -199,6 +199,11 @@ always_comb begin
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next_state.count = '0;
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end
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end
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default: begin
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next_state.macro = IDLE;
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next_state.count = '0;
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end
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endcase
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end
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@@ -220,6 +225,8 @@ always_comb begin
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end
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RXCMD:;
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default:;
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endcase
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end
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@@ -29,7 +29,7 @@ module super6502(
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input [7:0] SW,
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output logic [7:0] LED,
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inout logic [15: 0] ARDUINO_IO,
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inout logic [15: 2] ARDUINO_IO,
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///////// SDRAM /////////
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output DRAM_CLK,
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