Use udisksctl

2023-10-11 00:59:41 -07:00
parent 3900093349
commit d3ea5ed4d1
3 changed files with 195 additions and 177 deletions
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -90,9 +90,29 @@ run sim:
    - linux
    - iverilog
  stage: simulate
+  artifacts:
+    paths:
+      - hw/efinix_fpga/simulation/sim_top.vcd
  script:
    - source init_env.sh
    - cd hw/efinix_fpga/simulation
    - make sim
  dependencies:
    - build sim
+
+full sim:
+  tags:
+    - linux
+    - iverilog
+  stage: simulate
+  artifacts:
+    paths:
+      - hw/efinix_fpga/simulation/sim_top.vcd
+  script:
+    - source init_env.sh
+    - cd hw/efinix_fpga/simulation
+    - make clean
+    - TEST_PROGRAM=$REPO_TOP/sw/bios/bios.hex TEST_FOLDER=$REPO_TOP/sw/bios make full_sim
+  dependencies:
+    - build sim
+
--- a/hw/efinix_fpga/init_hex.mem
+++ b/hw/efinix_fpga/init_hex.mem
@@ -1,9 +1,9 @@
@00000000
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--- a/sw/script/create_verilog_image.sh
+++ b/sw/script/create_verilog_image.sh
@@ -1,4 +1,3 @@
-
 #!/bin/bash

 BOOTLOADER=$REPO_TOP/sw/bios/bootloader.bin
@@ -7,6 +6,8 @@ FILE=fs.fat
 TMPMOUNT=/tmp/lo
 FSDIR=$REPO_TOP/sw/fsdir

+MNT=/run/media/$USER/SUPER6502
+
 V=-v

 # Smallest number of blocks where mkfs doesn't complain
@@ -22,21 +23,18 @@ echo "$(tput bold setaf 11)Modifying Boot Sector$(tput sgr 0)"
 dd if=$BOOTLOADER of=$FILE bs=1 conv=notrunc count=11 $STATUS
 dd if=$BOOTLOADER of=$FILE bs=1 conv=notrunc count=380 seek=71 skip=71 $STATUS

-echo "$(tput bold setaf 11)Mounting Device$(tput sgr 0)"
-mkdir $V -p $TMPMOUNT
-sudo mount $FILE $TMPMOUNT
-echo
+
+LOOP=$(udisksctl loop-setup -f $FILE | grep -o "/dev/loop\([0-9]\)\+")
+MNT=$(udisksctl mount -b $LOOP $TMPMOUNT | grep -o "\([A-Za-z/-]*/\)SUPER6502")

 echo "$(tput bold setaf 11)Copying Files$(tput sgr 0)"
-sudo cp $V -r $FSDIR/* $TMPMOUNT
+cp $V -r $FSDIR/* $MNT
 echo

-echo "$(tput bold setaf 11)Unmounting Device$(tput sgr 0)"
-sudo umount $V $FILE
-rmdir $V $TMPMOUNT
-echo
+udisksctl unmount -b $LOOP
+
+udisksctl loop-delete -b $LOOP

-# Really I want the data width to be 512 bytes long, not 16...
 echo "$(tput bold setaf 11)Converting Image to Verilog$(tput sgr 0)"
 objcopy --input-target=binary --output-target=verilog --verilog-data-width=1 $FILE $FILE.hex
 echo "$(tput bold setaf 10)Done!$(tput sgr 0)"