Fixes for sim
This commit is contained in:
@@ -7,4 +7,25 @@ src/sub/rtl-common/src/rtl/ff_cdc.sv
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src/sub/rtl-common/src/rtl/shallow_async_fifo.sv
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src/sub/rtl-common/src/rtl/sync_fifo.sv
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src/sub/rtl-common/src/rtl/axi4_lite_to_apb4.sv
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ip/sdram_controller/sdram_controller.v
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ip/sdram_controller/sdram_controller.v
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src/sub/wb2axip/rtl/axilxbar.v
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src/sub/wb2axip/rtl/addrdecode.v
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src/sub/wb2axip/rtl/skidbuffer.v
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src/sub/sdspi/rtl/sdckgen.v
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src/sub/sdspi/rtl/sddma_rxgears.v
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src/sub/sdspi/rtl/sddma.v
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src/sub/sdspi/rtl/sdrxframe.v
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src/sub/sdspi/rtl/sdtxframe.v
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src/sub/sdspi/rtl/sddma_s2mm.v
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src/sub/sdspi/rtl/afifo.v
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src/sub/sdspi/rtl/sddma_txgears.v
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src/sub/sdspi/rtl/sdskid.v
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src/sub/sdspi/rtl/sdfrontend.v
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src/sub/sdspi/rtl/spicmd.v
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src/sub/sdspi/rtl/sdaxil.v
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src/sub/sdspi/rtl/sddma_mm2s.v
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src/sub/sdspi/rtl/sdio_top.v
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src/sub/sdspi/rtl/sdwb.v
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src/sub/sdspi/rtl/sdio.v
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src/sub/sdspi/rtl/sdcmd.v
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src/sub/sdspi/rtl/sdfifo.v
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@@ -10,7 +10,7 @@ TB_NAME=sim_top
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COPY_FILES=addr_map.mem init_hex.mem
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FLAGS=-DSIM -DRTL_SIM
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FLAGS=-DSIM -DRTL_SIM -DVERILATOR -DSDIO_AXI
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all: waves
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@@ -49,7 +49,7 @@ initial begin
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$dumpvars(0,sim_top);
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end
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logic button_reset;
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logic button_resetn;
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logic w_cpu0_reset;
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logic [15:0] w_cpu0_addr;
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@@ -120,9 +120,8 @@ logic o_sd_cmd;
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logic o_sd_cmd_oe;
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logic i_sd_dat;
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logic o_sd_dat;
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logic i_sd_dat_oe;
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logic o_sd_dat_oe;
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logic o_sd_clk;
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logic o_sd_cs;
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super6502_fpga u_dut (
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.i_sysclk (clk_100),
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@@ -130,7 +129,7 @@ super6502_fpga u_dut (
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.i_tACclk (~clk_200),
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.clk_cpu (clk_cpu),
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.button_reset (button_reset),
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.button_resetn (button_resetn),
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.o_cpu0_reset (w_cpu0_reset),
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.i_cpu0_addr (w_cpu0_addr),
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@@ -160,13 +159,12 @@ super6502_fpga u_dut (
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.i_sd_dat (i_sd_dat),
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.o_sd_dat (o_sd_dat),
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.o_sd_dat_oe (o_sd_dat_oe),
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.o_sd_clk (o_sd_clk),
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.o_sd_cs (o_sd_cs)
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.o_sd_clk (o_sd_clk)
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);
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sd_card_emu u_sd_card_emu(
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.clk(o_sd_clk),
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.rst(~button_reset),
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.rst(~button_resetn),
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.i_cmd(o_sd_cmd),
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.o_cmd(i_sd_cmd),
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.i_dat(o_sd_dat),
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@@ -174,11 +172,11 @@ sd_card_emu u_sd_card_emu(
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);
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initial begin
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button_reset <= '1;
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button_resetn <= '1;
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repeat(10) @(clk_cpu);
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button_reset <= '0;
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button_resetn <= '0;
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repeat(10) @(clk_cpu);
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button_reset <= '1;
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button_resetn <= '1;
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repeat(4000) @(posedge clk_cpu);
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$finish();
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end
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