bslathi19/super6502
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Fixes for sim

Browse Source
This commit is contained in:
Byron Lathi
2024-07-17 00:55:58 -07:00
parent 86c7977a42
commit fa6f6505d4
3 changed files with 31 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files

23
hw/super6502_fpga/sources.list
View File

@@ -7,4 +7,25 @@ src/sub/rtl-common/src/rtl/ff_cdc.sv
src/sub/rtl-common/src/rtl/shallow_async_fifo.sv src/sub/rtl-common/src/rtl/shallow_async_fifo.sv
src/sub/rtl-common/src/rtl/sync_fifo.sv src/sub/rtl-common/src/rtl/sync_fifo.sv
src/sub/rtl-common/src/rtl/axi4_lite_to_apb4.sv src/sub/rtl-common/src/rtl/axi4_lite_to_apb4.sv
ip/sdram_controller/sdram_controller.v ip/sdram_controller/sdram_controller.v
src/sub/wb2axip/rtl/axilxbar.v
src/sub/wb2axip/rtl/addrdecode.v
src/sub/wb2axip/rtl/skidbuffer.v
src/sub/sdspi/rtl/sdckgen.v
src/sub/sdspi/rtl/sddma_rxgears.v
src/sub/sdspi/rtl/sddma.v
src/sub/sdspi/rtl/sdrxframe.v
src/sub/sdspi/rtl/sdtxframe.v
src/sub/sdspi/rtl/sddma_s2mm.v
src/sub/sdspi/rtl/afifo.v
src/sub/sdspi/rtl/sddma_txgears.v
src/sub/sdspi/rtl/sdskid.v
src/sub/sdspi/rtl/sdfrontend.v
src/sub/sdspi/rtl/spicmd.v
src/sub/sdspi/rtl/sdaxil.v
src/sub/sdspi/rtl/sddma_mm2s.v
src/sub/sdspi/rtl/sdio_top.v
src/sub/sdspi/rtl/sdwb.v
src/sub/sdspi/rtl/sdio.v
src/sub/sdspi/rtl/sdcmd.v
src/sub/sdspi/rtl/sdfifo.v

2
hw/super6502_fpga/src/sim/Makefile
View File

@@ -10,7 +10,7 @@ TB_NAME=sim_top
COPY_FILES=addr_map.mem init_hex.mem COPY_FILES=addr_map.mem init_hex.mem
FLAGS=-DSIM -DRTL_SIM FLAGS=-DSIM -DRTL_SIM -DVERILATOR -DSDIO_AXI
all: waves all: waves

18
hw/super6502_fpga/src/sim/hvl/sim_top.sv
View File

@@ -49,7 +49,7 @@ initial begin
$dumpvars(0,sim_top); $dumpvars(0,sim_top);
end end
logic button_reset; logic button_resetn;
logic w_cpu0_reset; logic w_cpu0_reset;
logic [15:0] w_cpu0_addr; logic [15:0] w_cpu0_addr;
@@ -120,9 +120,8 @@ logic o_sd_cmd;
logic o_sd_cmd_oe; logic o_sd_cmd_oe;
logic i_sd_dat; logic i_sd_dat;
logic o_sd_dat; logic o_sd_dat;
logic i_sd_dat_oe; logic o_sd_dat_oe;
logic o_sd_clk; logic o_sd_clk;
logic o_sd_cs;
super6502_fpga u_dut ( super6502_fpga u_dut (
.i_sysclk (clk_100), .i_sysclk (clk_100),
@@ -130,7 +129,7 @@ super6502_fpga u_dut (
.i_tACclk (~clk_200), .i_tACclk (~clk_200),
.clk_cpu (clk_cpu), .clk_cpu (clk_cpu),
.button_reset (button_reset), .button_resetn (button_resetn),
.o_cpu0_reset (w_cpu0_reset), .o_cpu0_reset (w_cpu0_reset),
.i_cpu0_addr (w_cpu0_addr), .i_cpu0_addr (w_cpu0_addr),
@@ -160,13 +159,12 @@ super6502_fpga u_dut (
.i_sd_dat (i_sd_dat), .i_sd_dat (i_sd_dat),
.o_sd_dat (o_sd_dat), .o_sd_dat (o_sd_dat),
.o_sd_dat_oe (o_sd_dat_oe), .o_sd_dat_oe (o_sd_dat_oe),
.o_sd_clk (o_sd_clk), .o_sd_clk (o_sd_clk)
.o_sd_cs (o_sd_cs)
); );
sd_card_emu u_sd_card_emu( sd_card_emu u_sd_card_emu(
.clk(o_sd_clk), .clk(o_sd_clk),
.rst(~button_reset), .rst(~button_resetn),
.i_cmd(o_sd_cmd), .i_cmd(o_sd_cmd),
.o_cmd(i_sd_cmd), .o_cmd(i_sd_cmd),
.i_dat(o_sd_dat), .i_dat(o_sd_dat),
@@ -174,11 +172,11 @@ sd_card_emu u_sd_card_emu(
); );
initial begin initial begin
button_reset <= '1; button_resetn <= '1;
repeat(10) @(clk_cpu); repeat(10) @(clk_cpu);
button_reset <= '0; button_resetn <= '0;
repeat(10) @(clk_cpu); repeat(10) @(clk_cpu);
button_reset <= '1; button_resetn <= '1;
repeat(4000) @(posedge clk_cpu); repeat(4000) @(posedge clk_cpu);
$finish(); $finish();
end end