Commit Graph

21 Commits

Author SHA1 Message Date
Byron Lathi
3a9c0fb73f run vvp unbuffered 2023-10-25 22:47:22 -07:00
Byron Lathi
9d26265bb5 Update to use new binary sd card image 2023-10-22 16:45:41 -07:00
Byron Lathi
5f863c9857 Add code testbench 2023-10-21 17:07:43 -07:00
Byron Lathi
e621d4047b Add mapper and testbench 2023-10-16 23:45:33 -07:00
Byron Lathi
532364b8d2 remove sd from regular sim
Figure out how to do this later
2023-10-06 22:08:40 -07:00
Byron Lathi
fe72a4e9ea Remove dependency on file, since its created anyway 2023-10-06 13:21:54 -07:00
Byron Lathi
d27e442d5e Use REPO_TOP in script, call script from makefile 2023-10-06 13:18:36 -07:00
Byron Lathi
a3e0ab0e1e Use 8 bit memory !! Will eat all your RAM!
Figure out a better way to load memories that doesn't immediately oom
you.
2023-10-06 07:28:34 -07:00
Byron Lathi
cc32430f2a Refactor makefile, update verilog-sd-emulator 2023-09-29 23:48:28 -07:00
Byron Lathi
62967aa88d Resolve "Add build check to CI" 2023-09-29 05:14:52 +00:00
Byron Lathi
915188e8f1 New test program that causes the error 2023-09-26 18:23:01 -07:00
Byron Lathi
4ee21f23b6 Up the sim time 2023-09-25 19:13:06 -07:00
Byron Lathi
95e05292cc Fix clocks, define RTL_SIM 2023-09-24 23:58:32 -07:00
Byron Lathi
3fcfa4d3ac Add REPO_TOP env var 2023-09-24 10:35:17 -07:00
Byron Lathi
9bd031e35e Add support for test programs 2023-09-24 10:29:32 -07:00
Byron Lathi
d3aa195adf Add updated sim cpu with fix 2023-09-23 10:49:44 -07:00
Byron Lathi
5e03795c09 Get something simulated
Infinite loop being caused somewhere
2023-09-21 23:22:17 -07:00
Byron Lathi
1f503b2d80 update sim environment 2023-09-21 20:35:52 -07:00
Byron Lathi
6a1a76db35 Implement basic SPI controller 2023-07-21 23:01:37 -07:00
Byron Lathi
85f12c75f1 Start spi controller and tb 2023-07-21 22:10:39 -07:00
Byron Lathi
9a2f0a4bb4 Create interrupt controller 2023-01-03 14:50:45 -05:00