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4fb73f8e9746a8b41a322b8981f55b524c65e767
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8 Commits

Author SHA1 Message Date
Byron Lathi
4fb73f8e97 Update cs_testbench.sv 
Add uart_cs and fix error messages
 2022-03-14 10:56:15 -05:00
Byron Lathi
b48438f6b2 Add write and puts tasks to the uart testbench 
The write task will transmit a single byte, the puts task will transmit
a string of length n. These do not do any verification, you still have
to look at the output.
 2022-03-14 00:04:04 -05:00
Byron Lathi
e063e9f6a3 Add basic UART device 
So far the device only transmits the ASCII set on repeat, but will
become fully featured later.
 2022-03-13 19:42:41 -05:00
Byron Lathi
627b6a746a Add high pair of seven segment displays 
This also increases the number of registers to 4, one more for the high
pair of displays, and a final one for a mask register which has not been
implemented yet.
 2022-03-12 21:24:37 -06:00
Byron Lathi
ca4288df66 Change addr_decode test to use new io locations 
Instead of whatever was there before, the new io locations are ram, rom,
and the hex digits.
 2022-03-12 19:25:34 -06:00
Byron Lathi
ad55f986f5 Add bb_spi_controller 
Bit banged spi controller, very simple but very slow.
 2022-03-08 15:26:01 -06:00
Byron Lathi
16b50dcca7 Add io chip select 2022-03-05 23:15:50 -06:00
Byron Lathi
c70272f9de Add addr_decode and testbench 2022-03-05 20:11:47 -06:00