Byron Lathi
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9d26265bb5
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Update to use new binary sd card image
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2023-10-22 16:45:41 -07:00 |
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Byron Lathi
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5f863c9857
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Add code testbench
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2023-10-21 17:07:43 -07:00 |
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Byron Lathi
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e621d4047b
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Add mapper and testbench
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2023-10-16 23:45:33 -07:00 |
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Byron Lathi
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532364b8d2
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remove sd from regular sim
Figure out how to do this later
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2023-10-06 22:08:40 -07:00 |
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Byron Lathi
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fe72a4e9ea
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Remove dependency on file, since its created anyway
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2023-10-06 13:21:54 -07:00 |
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Byron Lathi
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d27e442d5e
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Use REPO_TOP in script, call script from makefile
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2023-10-06 13:18:36 -07:00 |
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Byron Lathi
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a3e0ab0e1e
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Use 8 bit memory !! Will eat all your RAM!
Figure out a better way to load memories that doesn't immediately oom
you.
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2023-10-06 07:28:34 -07:00 |
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Byron Lathi
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cc32430f2a
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Refactor makefile, update verilog-sd-emulator
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2023-09-29 23:48:28 -07:00 |
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Byron Lathi
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62967aa88d
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Resolve "Add build check to CI"
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2023-09-29 05:14:52 +00:00 |
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Byron Lathi
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915188e8f1
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New test program that causes the error
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2023-09-26 18:23:01 -07:00 |
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Byron Lathi
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4ee21f23b6
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Up the sim time
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2023-09-25 19:13:06 -07:00 |
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Byron Lathi
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95e05292cc
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Fix clocks, define RTL_SIM
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2023-09-24 23:58:32 -07:00 |
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Byron Lathi
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3fcfa4d3ac
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Add REPO_TOP env var
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2023-09-24 10:35:17 -07:00 |
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Byron Lathi
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9bd031e35e
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Add support for test programs
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2023-09-24 10:29:32 -07:00 |
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Byron Lathi
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d3aa195adf
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Add updated sim cpu with fix
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2023-09-23 10:49:44 -07:00 |
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Byron Lathi
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5e03795c09
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Get something simulated
Infinite loop being caused somewhere
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2023-09-21 23:22:17 -07:00 |
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Byron Lathi
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1f503b2d80
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update sim environment
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2023-09-21 20:35:52 -07:00 |
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Byron Lathi
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6a1a76db35
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Implement basic SPI controller
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2023-07-21 23:01:37 -07:00 |
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Byron Lathi
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85f12c75f1
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Start spi controller and tb
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2023-07-21 22:10:39 -07:00 |
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Byron Lathi
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9a2f0a4bb4
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Create interrupt controller
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2023-01-03 14:50:45 -05:00 |
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